Hi Paul, I can't make my X201 boot with the most recent commit: the screen turns on and it shows a blinking cursor, but that's all. Attached you can find the debug log: as you can see it has detected a stack smashing and it froze in a random point.
I don't have the build config right now, but it is based on the latest config in the board_status repo. Any idea? Best, Nicola April 16, 2018 9:58 AM, "Paul Menzel" <[email protected]> wrote: > Dear coreboot users, > > There is some uncertainty about the state of latest coreboot on the > Lenovo X201. Does the most recent commit from coreboot work on it, or > are there problems or regressions? > > Kind regards, > > Paul > -- > coreboot mailing list: [email protected] > https://mail.coreboot.org/mailman/listinfo/coreboot
USB coreboot-4.7-732-g0b643d2499-6QET70WW (1.40) Fri Apr 13 16:55:14 UTC 2018 romstage starting... PM1_CNT: 00001c00 SMBus controller enabled. CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 169c0 size 62c Intel ME early init Intel ME firmware is ready ME: Requested 32MB UMA SMBus controller enabled. CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'mrc.cache' CBFS: Found @ offset 1fdc0 size 10000 find_current_mrc_cache_local: No valid MRC cache found. reg2ca9_bit0 = 0 reg274265[0][0] = 5 reg274265[0][1] = 5 reg274265[0][2] = e reg274265[1][0] = 5 reg274265[1][1] = 5 reg274265[1][2] = e [6dc] <= 23faff [6e8] <= 23faff USB coreboot-4.7-732-g0b643d2499-6QET70WW (1.40) Fri Apr 13 16:55:14 UTC 2018 romstage starting... PM1_CNT: 00001c00 SMBus controller enabled. CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 169c0 size 62c Intel ME early init Intel ME firmware is ready ME: Requested 32MB UMA SMBus controller enabled. CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'mrc.cache' CBFS: Found @ offset 1fdc0 size 10000 find_current_mrc_cache_local: No valid MRC cache found. Timings: channel 0, slot 0, rank 0 lane 0: 20 (20) 67 (72) 68 (68) 87 (87) lane 1: 20 (20) 64 (6f) 6a (6a) 89 (89) lane 2: 20 (20) 6b (76) 75 (75) 92 (92) lane 3: 20 (20) 70 (7b) 76 (76) 94 (94) lane 4: 20 (20) 86 (91) 7f (7f) 9c (9c) lane 5: 20 (20) 89 (94) 7a (7a) 98 (98) lane 6: 20 (20) 99 (a4) 8a (8a) a9 (a9) lane 7: 20 (20) a0 (ab) 83 (83) a2 (a2) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 1, slot 0, rank 0 lane 0: 20 (20) 8c (97) 69 (69) 85 (85) lane 1: 20 (20) 8b (96) 68 (68) 84 (84) lane 2: 20 (20) 95 (a0) 74 (74) 8f (8f) lane 3: 20 (20) 92 (9d) 79 (79) 95 (95) lane 4: 20 (20) ad (b8) 84 (84) a1 (a1) lane 5: 20 (20) ad (b8) 7f (7f) 9c (9c) lane 6: 20 (20) b9 (c4) 90 (90) ab (ab) lane 7: 20 (20) bb (c6) 8a (8a) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 38 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 20 (20) 72 (72) 68 (68) 87 (87) lane 1: 20 (20) 6f (6f) 6a (6a) 89 (89) lane 2: 20 (20) 76 (76) 75 (75) 92 (92) lane 3: 20 (20) 7b (7b) 76 (76) 94 (94) lane 4: 20 (20) 91 (91) 7f (7f) 9c (9c) lane 5: 20 (20) 94 (94) 7a (7a) 98 (98) lane 6: 20 (20) a4 (a4) 8a (8a) a9 (a9) lane 7: 20 (20) ab (ab) 83 (83) a2 (a2) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 1, slot 0, rank 0 lane 0: 20 (20) 97 (97) 69 (69) 85 (85) lane 1: 20 (20) 96 (96) 68 (68) 84 (84) lane 2: 20 (20) a0 (a0) 74 (74) 8f (8f) lane 3: 20 (20) 9d (9d) 79 (79) 95 (95) lane 4: 20 (20) b8 (b8) 84 (84) a1 (a1) lane 5: 20 (20) b8 (b8) 7f (7f) 9c (9c) lane 6: 20 (20) c4 (c4) 90 (90) ab (ab) lane 7: 20 (20) c6 (c6) 8a (8a) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 20 (20) 72 (72) 68 (68) 87 (87) lane 1: 20 (20) 6f (6f) 6a (6a) 89 (89) lane 2: 20 (20) 76 (76) 75 (75) 92 (92) lane 3: 20 (20) 7b (7b) 76 (76) 94 (94) lane 4: 20 (20) 91 (91) 7f (7f) 9c (9c) lane 5: 20 (20) 94 (94) 7a (7a) 98 (98) lane 6: 20 (20) a4 (a4) 8a (8a) a9 (a9) lane 7: 20 (20) ab (ab) 83 (83) a2 (a2) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 1, slot 0, rank 0 lane 0: 12 (20) 89 (97) 69 (69) 85 (85) lane 1: 20 (20) 96 (96) 68 (68) 84 (84) lane 2: 20 (20) a0 (a0) 74 (74) 8f (8f) lane 3: 20 (20) 9d (9d) 79 (79) 95 (95) lane 4: 20 (20) b8 (b8) 84 (84) a1 (a1) lane 5: 20 (20) b8 (b8) 7f (7f) 9c (9c) lane 6: 20 (20) c4 (c4) 90 (90) ab (ab) lane 7: 20 (20) c6 (c6) 8a (8a) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 20 (20) 72 (72) 68 (68) 87 (87) lane 1: 20 (20) 6f (6f) 6a (6a) 89 (89) lane 2: 20 (20) 76 (76) 75 (75) 92 (92) lane 3: 20 (20) 7b (7b) 76 (76) 94 (94) lane 4: 20 (20) 91 (91) 7f (7f) 9c (9c) lane 5: 20 (20) 94 (94) 7a (7a) 98 (98) lane 6: 20 (20) a4 (a4) 8a (8a) a9 (a9) lane 7: 20 (20) ab (ab) 83 (83) a2 (a2) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 1, slot 0, rank 0 lane 0: 12 (20) 89 (97) 69 (69) 85 (85) lane 1: 13 (20) 89 (96) 68 (68) 84 (84) lane 2: 20 (20) a0 (a0) 74 (74) 8f (8f) lane 3: 20 (20) 9d (9d) 79 (79) 95 (95) lane 4: 20 (20) b8 (b8) 84 (84) a1 (a1) lane 5: 20 (20) b8 (b8) 7f (7f) 9c (9c) lane 6: 20 (20) c4 (c4) 90 (90) ab (ab) lane 7: 20 (20) c6 (c6) 8a (8a) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 20 (20) 72 (72) 68 (68) 87 (87) lane 1: 20 (20) 6f (6f) 6a (6a) 89 (89) lane 2: 20 (20) 76 (76) 75 (75) 92 (92) lane 3: 20 (20) 7b (7b) 76 (76) 94 (94) lane 4: 20 (20) 91 (91) 7f (7f) 9c (9c) lane 5: 20 (20) 94 (94) 7a (7a) 98 (98) lane 6: 20 (20) a4 (a4) 8a (8a) a9 (a9) lane 7: 20 (20) ab (ab) 83 (83) a2 (a2) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 1, slot 0, rank 0 lane 0: 12 (20) 89 (97) 69 (69) 85 (85) lane 1: 13 (20) 89 (96) 68 (68) 84 (84) lane 2: 12 (20) 92 (a0) 74 (74) 8f (8f) lane 3: 20 (20) 9d (9d) 79 (79) 95 (95) lane 4: 20 (20) b8 (b8) 84 (84) a1 (a1) lane 5: 20 (20) b8 (b8) 7f (7f) 9c (9c) lane 6: 20 (20) c4 (c4) 90 (90) ab (ab) lane 7: 20 (20) c6 (c6) 8a (8a) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 20 (20) 72 (72) 68 (68) 87 (87) lane 1: 20 (20) 6f (6f) 6a (6a) 89 (89) lane 2: 20 (20) 76 (76) 75 (75) 92 (92) lane 3: 20 (20) 7b (7b) 76 (76) 94 (94) lane 4: 20 (20) 91 (91) 7f (7f) 9c (9c) lane 5: 20 (20) 94 (94) 7a (7a) 98 (98) lane 6: 20 (20) a4 (a4) 8a (8a) a9 (a9) lane 7: 20 (20) ab (ab) 83 (83) a2 (a2) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 1, slot 0, rank 0 lane 0: 12 (20) 89 (97) 69 (69) 85 (85) lane 1: 13 (20) 89 (96) 68 (68) 84 (84) lane 2: 12 (20) 92 (a0) 74 (74) 8f (8f) lane 3: 12 (20) 8f (9d) 79 (79) 95 (95) lane 4: 20 (20) b8 (b8) 84 (84) a1 (a1) lane 5: 20 (20) b8 (b8) 7f (7f) 9c (9c) lane 6: 20 (20) c4 (c4) 90 (90) ab (ab) lane 7: 20 (20) c6 (c6) 8a (8a) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 20 (20) 72 (72) 68 (68) 87 (87) lane 1: 20 (20) 6f (6f) 6a (6a) 89 (89) lane 2: 20 (20) 76 (76) 75 (75) 92 (92) lane 3: 20 (20) 7b (7b) 76 (76) 94 (94) lane 4: 20 (20) 91 (91) 7f (7f) 9c (9c) lane 5: 20 (20) 94 (94) 7a (7a) 98 (98) lane 6: 20 (20) a4 (a4) 8a (8a) a9 (a9) lane 7: 20 (20) ab (ab) 83 (83) a2 (a2) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 1, slot 0, rank 0 lane 0: 12 (20) 89 (97) 69 (69) 85 (85) lane 1: 13 (20) 89 (96) 68 (68) 84 (84) lane 2: 12 (20) 92 (a0) 74 (74) 8f (8f) lane 3: 12 (20) 8f (9d) 79 (79) 95 (95) lane 4: 12 (20) aa (b8) 84 (84) a1 (a1) lane 5: 20 (20) b8 (b8) 7f (7f) 9c (9c) lane 6: 20 (20) c4 (c4) 90 (90) ab (ab) lane 7: 20 (20) c6 (c6) 8a (8a) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 20 (20) 72 (72) 68 (68) 87 (87) lane 1: 20 (20) 6f (6f) 6a (6a) 89 (89) lane 2: 20 (20) 76 (76) 75 (75) 92 (92) lane 3: 20 (20) 7b (7b) 76 (76) 94 (94) lane 4: 20 (20) 91 (91) 7f (7f) 9c (9c) lane 5: 20 (20) 94 (94) 7a (7a) 98 (98) lane 6: 20 (20) a4 (a4) 8a (8a) a9 (a9) lane 7: 20 (20) ab (ab) 83 (83) a2 (a2) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 1, slot 0, rank 0 lane 0: 12 (20) 89 (97) 69 (69) 85 (85) lane 1: 13 (20) 89 (96) 68 (68) 84 (84) lane 2: 12 (20) 92 (a0) 74 (74) 8f (8f) lane 3: 12 (20) 8f (9d) 79 (79) 95 (95) lane 4: 12 (20) aa (b8) 84 (84) a1 (a1) lane 5: 15 (20) ad (b8) 7f (7f) 9c (9c) lane 6: 20 (20) c4 (c4) 90 (90) ab (ab) lane 7: 20 (20) c6 (c6) 8a (8a) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 20 (20) 72 (72) 68 (68) 87 (87) lane 1: 20 (20) 6f (6f) 6a (6a) 89 (89) lane 2: 20 (20) 76 (76) 75 (75) 92 (92) lane 3: 20 (20) 7b (7b) 76 (76) 94 (94) lane 4: 20 (20) 91 (91) 7f (7f) 9c (9c) lane 5: 20 (20) 94 (94) 7a (7a) 98 (98) lane 6: 20 (20) a4 (a4) 8a (8a) a9 (a9) lane 7: 20 (20) ab (ab) 83 (83) a2 (a2) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 1, slot 0, rank 0 lane 0: 12 (20) 89 (97) 69 (69) 85 (85) lane 1: 13 (20) 89 (96) 68 (68) 84 (84) lane 2: 12 (20) 92 (a0) 74 (74) 8f (8f) lane 3: 12 (20) 8f (9d) 79 (79) 95 (95) lane 4: 12 (20) aa (b8) 84 (84) a1 (a1) lane 5: 15 (20) ad (b8) 7f (7f) 9c (9c) lane 6: 13 (20) b7 (c4) 90 (90) ab (ab) lane 7: 20 (20) c6 (c6) 8a (8a) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 20 (20) 72 (72) 68 (68) 87 (87) lane 1: 20 (20) 6f (6f) 6a (6a) 89 (89) lane 2: 20 (20) 76 (76) 75 (75) 92 (92) lane 3: 20 (20) 7b (7b) 76 (76) 94 (94) lane 4: 20 (20) 91 (91) 7f (7f) 9c (9c) lane 5: 20 (20) 94 (94) 7a (7a) 98 (98) lane 6: 20 (20) a4 (a4) 8a (8a) a9 (a9) lane 7: 20 (20) ab (ab) 83 (83) a2 (a2) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 1, slot 0, rank 0 lane 0: 12 (20) 89 (97) 69 (69) 85 (85) lane 1: 13 (20) 89 (96) 68 (68) 84 (84) lane 2: 12 (20) 92 (a0) 74 (74) 8f (8f) lane 3: 12 (20) 8f (9d) 79 (79) 95 (95) lane 4: 12 (20) aa (b8) 84 (84) a1 (a1) lane 5: 15 (20) ad (b8) 7f (7f) 9c (9c) lane 6: 13 (20) b7 (c4) 90 (90) ab (ab) lane 7: 12 (20) b8 (c6) 8a (8a) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 13 (20) 65 (72) 68 (68) 87 (87) lane 1: 20 (20) 6f (6f) 6a (6a) 89 (89) lane 2: 20 (20) 76 (76) 75 (75) 92 (92) lane 3: 20 (20) 7b (7b) 76 (76) 94 (94) lane 4: 20 (20) 91 (91) 7f (7f) 9c (9c) lane 5: 20 (20) 94 (94) 7a (7a) 98 (98) lane 6: 20 (20) a4 (a4) 8a (8a) a9 (a9) lane 7: 20 (20) ab (ab) 83 (83) a2 (a2) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 1, slot 0, rank 0 lane 0: 12 (20) 89 (97) 69 (69) 85 (85) lane 1: 13 (20) 89 (96) 68 (68) 84 (84) lane 2: 12 (20) 92 (a0) 74 (74) 8f (8f) lane 3: 12 (20) 8f (9d) 79 (79) 95 (95) lane 4: 12 (20) aa (b8) 84 (84) a1 (a1) lane 5: 15 (20) ad (b8) 7f (7f) 9c (9c) lane 6: 13 (20) b7 (c4) 90 (90) ab (ab) lane 7: 12 (20) b8 (c6) 8a (8a) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 13 (20) 65 (72) 68 (68) 87 (87) lane 1: 12 (20) 61 (6f) 6a (6a) 89 (89) lane 2: 20 (20) 76 (76) 75 (75) 92 (92) lane 3: 20 (20) 7b (7b) 76 (76) 94 (94) lane 4: 20 (20) 91 (91) 7f (7f) 9c (9c) lane 5: 20 (20) 94 (94) 7a (7a) 98 (98) lane 6: 20 (20) a4 (a4) 8a (8a) a9 (a9) lane 7: 20 (20) ab (ab) 83 (83) a2 (a2) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 1, slot 0, rank 0 lane 0: 12 (20) 89 (97) 69 (69) 85 (85) lane 1: 13 (20) 89 (96) 68 (68) 84 (84) lane 2: 12 (20) 92 (a0) 74 (74) 8f (8f) lane 3: 12 (20) 8f (9d) 79 (79) 95 (95) lane 4: 12 (20) aa (b8) 84 (84) a1 (a1) lane 5: 15 (20) ad (b8) 7f (7f) 9c (9c) lane 6: 13 (20) b7 (c4) 90 (90) ab (ab) lane 7: 12 (20) b8 (c6) 8a (8a) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 13 (20) 65 (72) 68 (68) 87 (87) lane 1: 12 (20) 61 (6f) 6a (6a) 89 (89) lane 2: 15 (20) 6b (76) 75 (75) 92 (92) lane 3: 20 (20) 7b (7b) 76 (76) 94 (94) lane 4: 20 (20) 91 (91) 7f (7f) 9c (9c) lane 5: 20 (20) 94 (94) 7a (7a) 98 (98) lane 6: 20 (20) a4 (a4) 8a (8a) a9 (a9) lane 7: 20 (20) ab (ab) 83 (83) a2 (a2) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 1, slot 0, rank 0 lane 0: 12 (20) 89 (97) 69 (69) 85 (85) lane 1: 13 (20) 89 (96) 68 (68) 84 (84) lane 2: 12 (20) 92 (a0) 74 (74) 8f (8f) lane 3: 12 (20) 8f (9d) 79 (79) 95 (95) lane 4: 12 (20) aa (b8) 84 (84) a1 (a1) lane 5: 15 (20) ad (b8) 7f (7f) 9c (9c) lane 6: 13 (20) b7 (c4) 90 (90) ab (ab) lane 7: 12 (20) b8 (c6) 8a (8a) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 13 (20) 65 (72) 68 (68) 87 (87) lane 1: 12 (20) 61 (6f) 6a (6a) 89 (89) lane 2: 15 (20) 6b (76) 75 (75) 92 (92) lane 3: 13 (20) 6e (7b) 76 (76) 94 (94) lane 4: 20 (20) 91 (91) 7f (7f) 9c (9c) lane 5: 20 (20) 94 (94) 7a (7a) 98 (98) lane 6: 20 (20) a4 (a4) 8a (8a) a9 (a9) lane 7: 20 (20) ab (ab) 83 (83) a2 (a2) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 1, slot 0, rank 0 lane 0: 12 (20) 89 (97) 69 (69) 85 (85) lane 1: 13 (20) 89 (96) 68 (68) 84 (84) lane 2: 12 (20) 92 (a0) 74 (74) 8f (8f) lane 3: 12 (20) 8f (9d) 79 (79) 95 (95) lane 4: 12 (20) aa (b8) 84 (84) a1 (a1) lane 5: 15 (20) ad (b8) 7f (7f) 9c (9c) lane 6: 13 (20) b7 (c4) 90 (90) ab (ab) lane 7: 12 (20) b8 (c6) 8a (8a) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 13 (20) 65 (72) 68 (68) 87 (87) lane 1: 12 (20) 61 (6f) 6a (6a) 89 (89) lane 2: 15 (20) 6b (76) 75 (75) 92 (92) lane 3: 13 (20) 6e (7b) 76 (76) 94 (94) lane 4: 14 (20) 85 (91) 7f (7f) 9c (9c) lane 5: 20 (20) 94 (94) 7a (7a) 98 (98) lane 6: 20 (20) a4 (a4) 8a (8a) a9 (a9) lane 7: 20 (20) ab (ab) 83 (83) a2 (a2) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 1, slot 0, rank 0 lane 0: 12 (20) 89 (97) 69 (69) 85 (85) lane 1: 13 (20) 89 (96) 68 (68) 84 (84) lane 2: 12 (20) 92 (a0) 74 (74) 8f (8f) lane 3: 12 (20) 8f (9d) 79 (79) 95 (95) lane 4: 12 (20) aa (b8) 84 (84) a1 (a1) lane 5: 15 (20) ad (b8) 7f (7f) 9c (9c) lane 6: 13 (20) b7 (c4) 90 (90) ab (ab) lane 7: 12 (20) b8 (c6) 8a (8a) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 13 (20) 65 (72) 68 (68) 87 (87) lane 1: 12 (20) 61 (6f) 6a (6a) 89 (89) lane 2: 15 (20) 6b (76) 75 (75) 92 (92) lane 3: 13 (20) 6e (7b) 76 (76) 94 (94) lane 4: 14 (20) 85 (91) 7f (7f) 9c (9c) lane 5: 15 (20) 89 (94) 7a (7a) 98 (98) lane 6: 20 (20) a4 (a4) 8a (8a) a9 (a9) lane 7: 20 (20) ab (ab) 83 (83) a2 (a2) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 1, slot 0, rank 0 lane 0: 12 (20) 89 (97) 69 (69) 85 (85) lane 1: 13 (20) 89 (96) 68 (68) 84 (84) lane 2: 12 (20) 92 (a0) 74 (74) 8f (8f) lane 3: 12 (20) 8f (9d) 79 (79) 95 (95) lane 4: 12 (20) aa (b8) 84 (84) a1 (a1) lane 5: 15 (20) ad (b8) 7f (7f) 9c (9c) lane 6: 13 (20) b7 (c4) 90 (90) ab (ab) lane 7: 12 (20) b8 (c6) 8a (8a) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 13 (20) 65 (72) 68 (68) 87 (87) lane 1: 12 (20) 61 (6f) 6a (6a) 89 (89) lane 2: 15 (20) 6b (76) 75 (75) 92 (92) lane 3: 13 (20) 6e (7b) 76 (76) 94 (94) lane 4: 14 (20) 85 (91) 7f (7f) 9c (9c) lane 5: 15 (20) 89 (94) 7a (7a) 98 (98) lane 6: 12 (20) 96 (a4) 8a (8a) a9 (a9) lane 7: 20 (20) ab (ab) 83 (83) a2 (a2) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 1, slot 0, rank 0 lane 0: 12 (20) 89 (97) 69 (69) 85 (85) lane 1: 13 (20) 89 (96) 68 (68) 84 (84) lane 2: 12 (20) 92 (a0) 74 (74) 8f (8f) lane 3: 12 (20) 8f (9d) 79 (79) 95 (95) lane 4: 12 (20) aa (b8) 84 (84) a1 (a1) lane 5: 15 (20) ad (b8) 7f (7f) 9c (9c) lane 6: 13 (20) b7 (c4) 90 (90) ab (ab) lane 7: 12 (20) b8 (c6) 8a (8a) a5 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 13 (20) 65 (72) 68 (68) 87 (87) lane 1: 12 (20) 61 (6f) 6a (6a) 89 (89) lane 2: 15 (20) 6b (76) 75 (75) 92 (92) lane 3: 13 (20) 6e (7b) 76 (76) 94 (94) lane 4: 14 (20) 85 (91) 7f (7f) 9c (9c) lane 5: 15 (20) 89 (94) 7a (7a) 98 (98) lane 6: 12 (20) 96 (a4) 8a (8a) a9 (a9) lane 7: 12 (20) 9d (ab) 83 (83) a2 (a2) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 1, slot 0, rank 0 lane 0: 12 (20) 89 (97) 69 (69) 89 (85) lane 1: 13 (20) 89 (96) 68 (68) 88 (84) lane 2: 12 (20) 92 (a0) 74 (74) 94 (8f) lane 3: 12 (20) 8f (9d) 79 (79) 99 (95) lane 4: 12 (20) aa (b8) 84 (84) a4 (a1) lane 5: 15 (20) ad (b8) 7f (7f) 9f (9c) lane 6: 13 (20) b7 (c4) 90 (90) b0 (ab) lane 7: 12 (20) b8 (c6) 8a (8a) aa (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 13 (20) 65 (72) 68 (68) 88 (87) lane 1: 12 (20) 61 (6f) 6a (6a) 8a (89) lane 2: 15 (20) 6b (76) 75 (75) 95 (92) lane 3: 13 (20) 6e (7b) 76 (76) 96 (94) lane 4: 14 (20) 85 (91) 7f (7f) 9f (9c) lane 5: 15 (20) 89 (94) 7a (7a) 9a (98) lane 6: 12 (20) 96 (a4) 8a (8a) aa (a9) lane 7: 12 (20) 9d (ab) 83 (83) a3 (a2) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 1, slot 0, rank 0 lane 0: 12 (20) 89 (97) 69 (69) 85 (85) lane 1: 13 (20) 89 (96) 68 (68) 85 (84) lane 2: 12 (20) 92 (a0) 74 (74) 90 (8f) lane 3: 12 (20) 8f (9d) 79 (79) 97 (95) lane 4: 12 (20) aa (b8) 84 (84) 9f (a1) lane 5: 15 (20) ad (b8) 7f (7f) 9a (9c) lane 6: 13 (20) b7 (c4) 90 (90) a9 (ab) lane 7: 12 (20) b8 (c6) 8a (8a) a4 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 0 (0) Timings: channel 0, slot 0, rank 0 lane 0: 6 (20) 65 (72) 68 (68) 86 (87) lane 1: 5 (20) 61 (6f) 6a (6a) 87 (89) lane 2: 8 (20) 6b (76) 75 (75) 92 (92) lane 3: 6 (20) 6e (7b) 76 (76) 93 (94) lane 4: 7 (20) 85 (91) 7f (7f) 9b (9c) lane 5: 8 (20) 89 (94) 7a (7a) 97 (98) lane 6: 5 (20) 96 (a4) 8a (8a) a7 (a9) lane 7: 5 (20) 9d (ab) 83 (83) a0 (a2) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 1, slot 0, rank 0 lane 0: 5 (20) 89 (97) 69 (69) 85 (85) lane 1: 6 (20) 89 (96) 68 (68) 85 (84) lane 2: 5 (20) 92 (a0) 74 (74) 90 (8f) lane 3: 5 (20) 8f (9d) 79 (79) 97 (95) lane 4: 5 (20) aa (b8) 84 (84) 9f (a1) lane 5: 8 (20) ad (b8) 7f (7f) 9a (9c) lane 6: 6 (20) b7 (c4) 90 (90) a9 (ab) lane 7: 5 (20) b8 (c6) 8a (8a) a4 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 1 (0) Timings: channel 0, slot 0, rank 0 lane 0: 6 (20) 65 (72) 68 (68) 86 (87) lane 1: 5 (20) 61 (6f) 6a (6a) 87 (89) lane 2: 8 (20) 6b (76) 75 (75) 92 (92) lane 3: 6 (20) 6e (7b) 76 (76) 93 (94) lane 4: 7 (20) 85 (91) 7f (7f) 9b (9c) lane 5: 8 (20) 89 (94) 7a (7a) 97 (98) lane 6: 5 (20) 96 (a4) 8a (8a) a7 (a9) lane 7: 5 (20) 9d (ab) 83 (83) a0 (a2) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) channel 1, slot 0, rank 0 lane 0: 5 (20) 89 (97) 69 (69) 85 (85) lane 1: 6 (20) 89 (96) 68 (68) 85 (84) lane 2: 5 (20) 92 (a0) 74 (74) 90 (8f) lane 3: 5 (20) 8f (9d) 79 (79) 97 (95) lane 4: 5 (20) aa (b8) 84 (84) 9f (a1) lane 5: 8 (20) ad (b8) 7f (7f) 9a (9c) lane 6: 6 (20) b7 (c4) 90 (90) a9 (ab) lane 7: 5 (20) b8 (c6) 8a (8a) a4 (a5) lane 8: 15 (20) 100 (10b) 80 (80) 80 (80) [178] = 0 (0) [10b] = 1 (0) CBMEM: IMD: root @ bf7ff000 254 entries. IMD: root @ bf7fec00 62 entries. [6dc] = 23faff [6e8] = 23faff Relocate MRC DATA from fefceff4 to bf7dc000 (1472 bytes) ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : NO ME: Manufacturing Mode : NO ME: Boot Options Present : NO ME: Update In Progress : NO ME: Current Working State : Normal ME: Current Operation State : M0 with UMA ME: Current Operation Mode : Normal ME: Error Code : No Error ME: Progress Phase : uKernel Phase ME: Power Management Event : Clean Moff->Mx wake ME: Progress Phase State : Unknown 0x00 TPM initialization. TPM: Init Found TPM ST33ZP24 by ST Microelectronics TPM: Open TPM: Startup TPM: command 0x99 returned 0x0 TPM: OK. Smashed stack detected in romstage! Smashed stack detected in romstage! Smashed stack detected in romstage! Smashed stack detected in romstage! MTRR Range: Start=ff800000 End=0 (Size 800000) MTRR Range: Start=0 End=1000000 (Size 1000000) MTRR Range: Start=bf000000 End=bf800000 (Size 800000) MTRR Range: Start=bf800000 End=c0000000 (Size 800000) CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'fallback/ramstage' CBFS: Found @ offset 2fe00 size 149ff Decompressing stage fallback/ramstage @ 0xbf79cfc0 (234864 bytes) Loading module at bf79d000 with entry bf79d000. filesize: 0x2b130 memsize: 0x39530 Processing 2807 relocs. Offset value of 0xbf69d000 usbdebug: ramstage starting... Normal boot. BS: BS_PRE_DEVICE times (us): entry 0 run 1 exit 0 BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 2 exit 0 Enumerating buses... CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 169c0 size 62c CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 169c0 size 62c PMH7: ID 04 Revision 20 PNP: 00ff.1 enabled EC Firmware ID 6QHT34WW-3.18, Version 5.01B CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 169c0 size 62c CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 169c0 size 62c CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 169c0 size 62c CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 169c0 size 62c H8: BDC not installed H8: WWAN detection not implemented. Assuming WWAN installed CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 169c0 size 62c CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 169c0 size 62c CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 169c0 size 62c CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 169c0 size 62c dock is not connected PNP: 00ff.2 enabled CPU_CLUSTER: 0 enabled DOMAIN: 0000 enabled PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [8086/0044] enabled PCI: 00:01.0 subordinate bus PCI Express PCI: 00:01.0 [8086/0045] enabled PCI: 00:02.0 [8086/0046] enabled PCI: 00:16.0 [8086/3b64] enabled PCI: Static device PCI: 00:16.2 not found, disabling it. PCI: 00:19.0 [8086/10ea] enabled PCI: 00:1a.0 [8086/3b3c] enabled PCI: 00:1b.0 [8086/3b56] enabled PCI: 00:1c.0 subordinate bus PCI Express PCI: 00:1c.0 [8086/3b42] enabled PCI: 00:1c.1 subordinate bus PCI Express PCI: 00:1c.1 [8086/3b44] enabled PCI: 00:1c.3 subordinate bus PCI Express PCI: 00:1c.3 [8086/3b48] enabled PCI: 00:1c.4 subordinate bus PCI Express PCI: 00:1c.4 [8086/3b4a] enabled PCI: 00:1d.0 [8086/3b34] enabled PCI: 00:1e.0 [8086/2448] enabled PCI: 00:1f.0 [8086/3b07] enabled CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 169c0 size 62c PCI: 00:1f.2 [8086/3b2e] enabled PCI: 00:1f.3 [8086/3b30] enabled PCI: 00:1f.6 [8086/3b32] enabled PCI: pci_scan_bus for bus 01 scan_bus: scanning of bus PCI: 00:01.0 took 2268 usecs PCI: pci_scan_bus for bus 02 scan_bus: scanning of bus PCI: 00:1c.0 took 2772 usecs PCI: pci_scan_bus for bus 03 scan_bus: scanning of bus PCI: 00:1c.1 took 2772 usecs PCI: pci_scan_bus for bus 04 scan_bus: scanning of bus PCI: 00:1c.3 took 2772 usecs PCI: pci_scan_bus for bus 05 PCI: 05:00.0 [10ec/8176] enabled Enabling Common Clock Configuration ASPM: Enabled L0s and L1 Failed to enable LTR for dev = PCI: 05:00.0 scan_bus: scanning of bus PCI: 00:1c.4 took 15125 usecs PCI: pci_scan_bus for bus 06 scan_bus: scanning of bus PCI: 00:1e.0 took 2157 usecs PNP: 164e.3 enabled PNP: 164e.2 disabled PNP: 164e.7 disabled PNP: 164e.19 disabled PNP: 0c31.0 enabled scan_bus: scanning of bus PCI: 00:1f.0 took 9625 usecs bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled scan_bus: scanning of bus PCI: 00:1f.3 took 29500 usecs scan_bus: scanning of bus DOMAIN: 0000 took 193742 usecs scan_bus: scanning of bus Root Device took 339351 usecs done BS: BS_DEV_ENUMERATE times (us): entry 0 run 347239 exit 0 found VGA at PCI: 00:02.0 Setting up VGA for PCI: 00:02.0 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... PNP: 00ff.1 missing read_resources PNP: 00ff.2 missing read_resources Adding PCIe enhanced config space BAR 0xe0000000-0xf0000000. ram_before_4g_top: 0xbf800000 TOUUD: 0x12c0 PCI: 00:1a.0 EHCI BAR hook registered More than one caller of pci_ehci_read_resources from PCI: 00:1d.0 Done reading resources. skipping PNP: 164e.3@29 fixed resource, size=0! skipping PNP: 164e.3@f0 fixed resource, size=0! Setting resources... PNP: 00ff.1 missing set_resources PNP: 00ff.2 missing set_resources PCI: 00:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io PCI: 00:01.0 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 01 prefmem PCI: 00:01.0 20 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 01 mem PCI: 00:02.0 10 <- [0x00cf800000 - 0x00cfbfffff] size 0x00400000 gran 0x16 mem64 PCI: 00:02.0 20 <- [0x0000003040 - 0x0000003047] size 0x00000008 gran 0x03 io PCI: 00:16.0 10 <- [0x00cfd2a000 - 0x00cfd2a00f] size 0x00000010 gran 0x04 mem64 PCI: 00:19.0 10 <- [0x00cfd00000 - 0x00cfd1ffff] size 0x00020000 gran 0x11 mem PCI: 00:19.0 14 <- [0x00cfd24000 - 0x00cfd24fff] size 0x00001000 gran 0x0c mem PCI: 00:19.0 18 <- [0x0000003000 - 0x000000301f] size 0x00000020 gran 0x05 io PCI: 00:1a.0 EHCI Debug Port hook triggered PCI: 00:1a.0 10 <- [0x00cfd27000 - 0x00cfd273ff] size 0x00000400 gran 0x0a mem PCI: 00:1a.0 EHCI Debug Port relocated PCI: 00:1b.0 10 <- [0x00cfd20000 - 0x00cfd23fff] size 0x00004000 gran 0x0e mem64 PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io PCI: 00:1c.0 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 02 prefmem PCI: 00:1c.0 20 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 02 mem PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io PCI: 00:1c.1 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 03 prefmem PCI: 00:1c.1 20 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 03 mem PCI: 00:1c.3 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io PCI: 00:1c.3 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 04 prefmem PCI: 00:1c.3 20 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 04 mem PCI: 00:1c.4 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 05 io PCI: 00:1c.4 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 05 prefmem PCI: 00:1c.4 20 <- [0x00cfc00000 - 0x00cfcfffff] size 0x00100000 gran 0x14 bus 05 mem PCI: 05:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io PCI: 05:00.0 18 <- [0x00cfc00000 - 0x00cfc03fff] size 0x00004000 gran 0x0e mem64 PCI: 00:1d.0 10 <- [0x00cfd28000 - 0x00cfd283ff] size 0x00000400 gran 0x0a mem PCI: 00:1e.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 06 io PCI: 00:1e.0 24 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 06 prefmem PCI: 00:1e.0 20 <- [0x00cfffffff - 0x00cffffffe] size 0x00000000 gran 0x14 bus 06 mem PNP: 164e.3 60 <- [0x0000000200 - 0x0000000207] size 0x00000008 gran 0x03 io PNP: 164e.3 29 <- [0x00000000b0 - 0x00000000af] size 0x00000000 gran 0x00 irq PNP: 164e.3 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq PNP: 164e.3 f0 <- [0x0000000082 - 0x0000000081] size 0x00000000 gran 0x00 irq PCI: 00:1f.2 10 <- [0x0000003048 - 0x000000304f] size 0x00000008 gran 0x03 io PCI: 00:1f.2 14 <- [0x0000003058 - 0x000000305b] size 0x00000004 gran 0x02 io PCI: 00:1f.2 18 <- [0x0000003050 - 0x0000003057] size 0x00000008 gran 0x03 io PCI: 00:1f.2 1c <- [0x000000305c - 0x000000305f] size 0x00000004 gran 0x02 io PCI: 00:1f.2 20 <- [0x0000003020 - 0x000000303f] size 0x00000020 gran 0x05 io PCI: 00:1f.2 24 <- [0x00cfd26000 - 0x00cfd267ff] size 0x00000800 gran 0x0b mem PCI: 00:1f.3 10 <- [0x00cfd29000 - 0x00cfd290ff] size 0x00000100 gran 0x08 mem64 PCI: 00:1f.6 10 <- [0x00cfd25000 - 0x00cfd25fff] size 0x00001000 gran 0x0c mem64 Done setting resources. Done allocating resources. BS: BS_DEV_RESOURCES times (us): entry 0 run 370748 exit 0 Enabling resources... PCI: 00:00.0 subsystem <- 17aa/2193 PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 bridge ctrl <- 0003 PCI: 00:01.0 cmd <- 00 PCI: 00:02.0 subsystem <- 17aa/215a PCI: 00:02.0 cmd <- 03 PCI: 00:16.0 cmd <- 02 PCI: 00:19.0 subsystem <- 17aa/2153 PCI: 00:19.0 cmd <- 03 PCI: 00:1a.0 subsystem <- 17aa/2163 PCI: 00:1a.0 cmd <- 06 PCI: 00:1b.0 subsystem <- 17aa/215e PCI: 00:1b.0 cmd <- 02 PCI: 00:1c.0 bridge ctrl <- 0003 PCI: 00:1c.0 cmd <- 00 PCI: 00:1c.1 bridge ctrl <- 0003 PCI: 00:1c.1 cmd <- 00 PCI: 00:1c.3 bridge ctrl <- 0003 PCI: 00:1c.3 cmd <- 00 PCI: 00:1c.4 bridge ctrl <- 0003 PCI: 00:1c.4 cmd <- 07 PCI: 00:1d.0 subsystem <- 17aa/2163 PCI: 00:1d.0 cmd <- 02 PCI: 00:1e.0 bridge ctrl <- 0003 PCI: 00:1e.0 cmd <- 00 pch_decode_init PCI: 00:1f.0 subsystem <- 17aa/2166 PCI: 00:1f.0 cmd <- 107 PCI: 00:1f.2 subsystem <- 17aa/2168 PCI: 00:1f.2 cmd <- 03 PCI: 00:1f.3 subsystem <- 17aa/2167 PCI: 00:1f.3 cmd <- 03 PCI: 00:1f.6 cmd <- 02 PCI: 05:00.0 cmd <- 03 done. BS: BS_DEV_ENABLE times (us): entry 0 run 88000 exit 0 Initializing devices... Root Device init ... Root Device init finished in 1376 usecs PNP: 00ff.2 init ... PNP: 00ff.2 init finished in 1496 usecs CPU_CLUSTER: 0 init ... start_eip=0x00001000, code_size=0x00000031 Setting up SMI for CPU Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8 Processing 12 relocs. Offset value of 0x00038000 SMM Module: stub loaded at 00038000. Will call bf7b514a(bf7d24a0) Installing SMM handler to 0xbf800000 Loading module at bf810000 with entry bf8105ff. filesize: 0x1a98 memsize: 0x5ac0 Processing 80 relocs. Offset value of 0xbf810000 Loading module at bf808000 with entry bf808000. filesize: 0x1a8 memsize: 0x1a8 Processing 12 relocs. Offset value of 0xbf808000 SMM Module: placing jmp sequence at bf807c00 rel16 0x03fd SMM Module: placing jmp sequence at bf807800 rel16 0x07fd SMM Module: placing jmp sequence at bf807400 rel16 0x0bfd SMM Module: stub loaded at bf808000. Will call bf8105ff(00000000) Initializing southbridge SMI... SMI_STS: MCSMI PM1 PM1_STS: WAK BM TMROF GPE0_STS: GPIO14 GPIO11 GPIO9 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0 TCO_STS: In relocation handler: cpu 0 New SMBASE=0xbf800000 IEDBASE=0xbfc00000 @ 0003fc00 Writing SMRR. base = 0xbf800006, mask=0xff800800 Relocation complete. Locking SMM. Initializing CPU #0 CPU: vendor Intel device 20655 CPU: family 06, model 25, stepping 05 Enabling cache CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'cpu_microcode_blob.bin' CBFS: Found @ offset 13540 size 2c00 microcode: sig=0x20655 pf=0x10 revision=0x4 CPU: Intel(R) Core(TM) i5 CPU M 520 @ 2.40GHz. CPU:lapic=0, boot_cpu=1 MTRR: Physical address space: 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 0x00000000000c0000 - 0x00000000bf800000 size 0xbf740000 type 6 0x00000000bf800000 - 0x00000000d0000000 size 0x10800000 type 0 0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1 0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0 0x0000000100000000 - 0x000000012c000000 size 0x2c000000 type 6 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 CPU physical address size: 36 bits MTRR: default type WB/UC MTRR counts: 4/5. MTRR: WB selected as default type. MTRR: 0 base 0x00000000bf800000 mask 0x0000000fff800000 type 0 MTRR: 1 base 0x00000000c0000000 mask 0x0000000ff0000000 type 0 MTRR: 2 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1 MTRR: 3 base 0x00000000e0000000 mask 0x0000000fe0000000 type 0 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local APIC... apic_id: 0x00 done. VMX status: enabled, locked model_x06ax: frequency set to 2394 Turbo is available and visible CPU: 0 has 2 cores, 2 threads per core CPU: 0 has core 1 In relocation handler: cpu 1 New SMBASE=0xbf7ffc00 IEDBASE=0xbfc00000 @ 0003fc00 Writing SMRR. base = 0xbf800006, mask=0xff800800 Initializing CPU #1 CPU: 0 has core 4 CPU: vendor Intel device 20655 CPU: family 06, model 25, stepping 05 Enabling cache CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'cpu_microcode_blob.bin' In relocation handler: cpu 2 CBFS: Found @ offset 13540 size 2c00 microcode: sig=0x20655 pf=0x10 revision=0x4 New SMBASE=0xbf7ff800 IEDBASE=0xbfc00000 @ 0003fc00 CPU: Intel(R) Core(TM) i5 CPU M 520 @ 2.40GHz. CPU:lapic=1, boot_cpu=0 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 Writing SMRR. base = 0xbf800006, mask=0xff800800 CPU physical address size: 36 bits CPU: 0 has core 5 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Initializing CPU #2 Setting up local APIC... apic_id: 0x01 done. VMX status: enabled, locked In relocation handler: cpu 3 model_x06ax: frequency set to 2394 CPU #1 initialized New SMBASE=0xbf7ff400 IEDBASE=0xbfc00000 @ 0003fc00 CPU: vendor Intel device 20655 Writing SMRR. base = 0xbf800006, mask=0xff800800 CPU: family 06, model 25, stepping 05 CPU #0 initialized Initializing CPU #3 CPU_CLUSTER: 0 init finished in 418375 usecs CPU: vendor Intel device 20655 PCI: 00:00.0 init ... CPU: family 06, model 25, stepping 05 Set BIOS_RESET_CPL Enabling cache PCI: 00:00.0 init finished in 11113 usecs CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) PCI: 00:02.0 init ... GT Power Management Init CBFS: Locating 'cpu_microcode_blob.bin' IVB GT1 Power Meter Weights Enabling cache CBFS: Found @ offset 13540 size 2c00 CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) GT init timeout CBFS: Locating 'cpu_microcode_blob.bin' CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'pci8086,0046.rom' CBFS: Found @ offset 13540 size 2c00 CBFS: Found @ offset 44840 size 10000 In CBFS, ROM address for PCI: 00:02.0 = ffdd4a88 microcode: sig=0x20655 pf=0x10 revision=0x0 Copying VGA ROM Image from ffdd4a88 to 0xc0000, 0x10000 bytes microcode: sig=0x20655 pf=0x10 revision=0x0 microcode: updated to revision 0x4 date=2013-06-28 CPU: Intel(R) Core(TM) i5 CPU M 520 @ 2.40GHz. CPU: Intel(R) Core(TM) i5 CPU M 520 @ 2.40GHz. Calling Option ROM... CPU:lapic=4, boot_cpu=0 CPU:lapic=5, boot_cpu=0 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 intel_vga_int15_handler: AX=5fac BX=c000 CX=0000 DX=03c0 Unknown INT15 function 5fac! int15 call returned error. MTRR: Fixed MSR 0x258 0x0606060606060606 intel_vga_int15_handler: AX=5f40 BX=0000 CX=0004 DX=0001 DISPLAY=2 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 intel_vga_int15_handler: AX=5f35 BX=c000 CX=0002 DX=03da MTRR: Fixed MSR 0x26c 0x0606060606060606 intel_vga_int15_handler: AX=5f70 BX=c003 CX=0002 DX=0303 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 CPU physical address size: 36 bits CPU physical address size: 36 bits MTRR check MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local APIC...Setting up local APIC... apic_id: 0x04 done. apic_id: 0x05 done. VMX status: enabled, locked VMX status: enabled, locked model_x06ax: frequency set to 2394 model_x06ax: frequency set to 2394 CPU #2 initialized CPU #3 initialized ... Option ROM returned. VGA Option ROM was run GT Power Management Init (post VBIOS) GT init timeout PCI: 00:02.0 init finished in 270255 usecs PCI: 00:16.0 init ... ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : NO ME: Manufacturing Mode : YES ME: Boot Options Present : NO ME: Update In Progress : NO ME: Current Working State : Normal ME: Current Operation State : M0 with UMA ME: Current Operation Mode : Normal ME: Error Code : No Error ME: Progress Phase : Host Communication ME: Power Management Event : Clean Moff->Mx wake ME: Progress Phase State : Host communication established ME: BIOS path: Normal ME: Extend SHA-256: 4525e6abe84786a34336e0a901dcaacbfc97cfc5bf640f7b78eb11bac53c2f86 PCI: 00:16.0 init finished in 57376 usecs PCI: 00:19.0 init ... PCI: 00:19.0 init finished in 1621 usecs PCI: 00:1a.0 init ... EHCI: Setting up controller.. done. PCI: 00:1a.0 init finished in 4998 usecs PCI: 00:1b.0 init ... Azalia: base = cfd20000 Azalia: V1CTL disabled. Azalia: codec_mask = 09 Azalia: Initializing codec #3 Azalia: codec viddid: 80862804 Azalia: verb_size: 16 Azalia: verb loaded. Azalia: Initializing codec #0 Azalia: codec viddid: 14f15069 Azalia: verb_size: 44 Azalia: verb loaded. PCI: 00:1b.0 init finished in 28874 usecs PCI: 00:1d.0 init ... EHCI: Setting up controller.. done. PCI: 00:1d.0 init finished in 4991 usecs PCI: 00:1e.0 init ... PCI init. PCI: 00:1e.0 init finished in 2882 usecs PCI: 00:1f.0 init ... pch: lpc_init IOAPIC: Initializing IOAPIC at 0xfec00000 IOAPIC: Bootstrap Processor Local APIC = 0x00 IOAPIC: ID = 0x01 CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 169c0 size 62c Set power off after power failure. CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 169c0 size 62c NMI sources enabled. Mobile 5 PM init rtc_failed = 0x0 RTC Init Disabling ACPI via APMC: done. PCI: 00:1f.0 init finished in 48002 usecs PCI: 00:1f.2 init ... SATA: Initializing... CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 169c0 size 62c SATA: Controller in AHCI mode. ABAR: cfd26000 PCI: 00:1f.2 init finished in 19403 usecs PCI: 00:1f.3 init ... PCI: 00:1f.3 init finished in 1756 usecs PCI: 00:1f.6 init ... Thermal init start. Thermal init done. PCI: 00:1f.6 init finished in 5371 usecs PCI: 05:00.0 init ... PCI: 05:00.0 init finished in 1498 usecs PNP: 164e.3 init ... PNP: 164e.3 init finished in 1497 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ... I2C: 01:54 init finished in 3616 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ... I2C: 01:55 init finished in 4248 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ... I2C: 01:56 init finished in 4247 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ... I2C: 01:57 init finished in 4247 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ... Locking EEPROM RFID init EEPROM done I2C: 01:5c init finished in 31122 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ... I2C: 01:5d init finished in 3498 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ... I2C: 01:5e init finished in 4123 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ... I2C: 01:5f init finished in 4123 usecs Devices initialized Updating MRC cache data. CBFS: 'Master Header Locator' located CBFS at [590200:7fffc0) CBFS: Locating 'mrc.cache' CBFS: Found @ offset 1fdc0 size 10000 find_current_mrc_cache_local: No valid MRC cache found. Manufacturer: c2 SF: Detected MX25L6405D with sector size 0x1000, total 0x800000 Need to erase the MRC cache region of 65536 bytes at ffdb0000 SF: Successfully erased 65536 bytes @ 0x5b0000 Finally: write MRC cache update to flash at ffdb0000 Successfully wrote MRC cache BS: BS_DEV_INIT times (us): entry 4 run 1039096 exit 670979 Finalize devices... PCI: 00:1f.0 final
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