On 28.04.2018 17:34, Kyösti Mälkki wrote: > On Sat, Apr 28, 2018 at 3:41 PM, Nicola Corna <[email protected]> wrote: >> April 27, 2018 12:29 PM, "Nicola Corna" <[email protected]> wrote: >> >>>> With config PARALLEL_CPU_INIT=y so SMP / SMM init in initialize_cpus() >>>> will never call wait_other_cpus() at all. That actually regressed in >>>> my commit 0cc2ce4 [1] but I can't test if reverting it solves this for >>>> you. I'll push a regression fix soonish for review. >>>> >>>> [1] https://review.coreboot.org/c/coreboot/+/21088 >>>> >>>> Kyösti >>> >>> I'm going to test https://review.coreboot.org/#/c/coreboot/+/25874 soon and >>> report back, thanks for your help. >> >> Unfortunately that patch dont't fix the issue (log attached). >> I've also tried 0cc2ce4 but with that revision it works correctly >> (log and config attached). >> >> If needed I can run a git bisect to find which commit broke the boot. >> > > I thought I had seen some other message [1] on the list regarding > X201(i) not booting or resuming. Looking at your boot log ending on > "0:1f.0 final", it appears we are looking at the same commit which > adds INTEL_CHIPSET_LOCKDOWN implementation in lpc_final(). The commit > message tells it was not tested for ibexpeak so you may want to try > revert that one before going for full bisect.
Yes, that's very likely a problem. It looks like the whole finalize code path of the X201 was untested all the time (even on resume). I don't remember if EHCI debug works in SMM? If it does, you could enable log- ging for the SMI handler as well (if you want to debug it). Nico -- coreboot mailing list: [email protected] https://mail.coreboot.org/mailman/listinfo/coreboot
