David Brownell <[email protected]> writes:
> On Thursday 29 January 2009, Kevin Hilman wrote:
>> Also, rename a few of the not-yet-used clocks to lowercase.
>>
>> Signed-off-by: Kevin Hilman <[email protected]>
>> ---
>> Depends on previous clock/pll patches now in Davinci git.
>
> OK, but see the appended... I'm not sure what else is
> grabbing the aemif clock on dm6446 (other than NAND),
> but its usecount is two not one.
Probably because it has an ALWAYS_ENABLED flag, triggering an early
clk_enable(). This should go away on dm644x as you've done on dm355.
> Feel free to split this up a bit if you like...
>
OK thanks, it all looks good. I'll pull it in.
I also have to rework things slightly on top of RMKs new clkdev layer
which is in 2.6.29-rc kernels.
Not sure I'm gonna have things soon enough for the merge window... but
working on it.
I want to get the clock framework right before anything else since so
many other things depend on it.
Kevin
> - Dave
>
>
> ====== CUT HERE
> More clock tweaks:
>
> - NAND
> * use updated clock name
> - dm355
> * don't force AEMIF clock on
> * rename aux_clk as pll1_aux_clk
> * better vpss clock handling
> * /proc/davinci_clocks better matches sprs463f.pdf fig 3-2
> - dm355evm
> * enable AEMIF for dm9000
> - dm644x
> * link pll2_sysclkbp to list
> * show and use pll1_aux_clk
> * include vicp, vpss, and pwm clocks
> - dm644xevm
> * on boot, announce as "DM644x" EVM
> - dm646x
> * doesn't use aux_clk like dm355 or dm644x; pll1_sysclk3 instead
> * include pwm clocks
>
> So now dm355 and dm644x both expect video FE and BE to explicitly
> manage the VPSS clocks they'll be using.
>
> NOTE: on dm355, sysclkbp values (for both PLLs) are incorrect.
>
> ---
> arch/arm/mach-davinci/board-dm355-evm.c | 7 +++
> arch/arm/mach-davinci/board-dm644x-evm.c | 2
> arch/arm/mach-davinci/dm355.c | 54 +++++++++++++-----------
> arch/arm/mach-davinci/dm644x.c | 65 +++++++++++++++++++++++++----
> arch/arm/mach-davinci/dm646x.c | 20 +++++++-
> arch/arm/mach-davinci/psc.c | 4 -
> drivers/mtd/nand/davinci_nand.c | 6 +-
> 7 files changed, 116 insertions(+), 42 deletions(-)
>
> --- a/arch/arm/mach-davinci/board-dm355-evm.c
> +++ b/arch/arm/mach-davinci/board-dm355-evm.c
> @@ -16,6 +16,7 @@
> #include <linux/mtd/mtd.h>
> #include <linux/mtd/partitions.h>
> #include <linux/mtd/nand.h>
> +#include <linux/clk.h>
> #include <linux/i2c.h>
> #include <linux/io.h>
> #include <linux/gpio.h>
> @@ -231,10 +232,16 @@ static struct spi_board_info dm355_evm_s
>
> static __init void dm355_evm_init(void)
> {
> + struct clk *aemif;
> +
> gpio_request(1, "dm9000");
> gpio_direction_input(1);
> dm355evm_dm9000_rsrc[2].start = gpio_to_irq(1);
>
> + aemif = clk_get(&dm355evm_dm9000.dev, "aemif");
> + clk_enable(aemif);
> + clk_put(aemif);
> +
> platform_add_devices(davinci_evm_devices,
> ARRAY_SIZE(davinci_evm_devices));
> evm_init_i2c();
> --- a/arch/arm/mach-davinci/board-dm644x-evm.c
> +++ b/arch/arm/mach-davinci/board-dm644x-evm.c
> @@ -668,7 +668,7 @@ static __init void davinci_evm_irq_init(
> davinci_irq_init();
> }
>
> -MACHINE_START(DAVINCI_EVM, "DaVinci EVM")
> +MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
> /* Maintainer: MontaVista Software <[email protected]> */
> .phys_io = IO_PHYS,
> .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
> --- a/arch/arm/mach-davinci/dm355.c
> +++ b/arch/arm/mach-davinci/dm355.c
> @@ -51,10 +51,11 @@ static struct clk pll1_clk = {
> .pll_data = &pll1_data,
> };
>
> -static struct clk aux_clk = {
> - .name = "aux_clk",
> +static struct clk pll1_aux_clk = {
> + .name = "pll1_aux_clk",
> .parent = &ref_clk,
> .flags = CLK_PLL,
> + /* gated by PLL1 CKEN.AUXEN */
> };
>
> static struct clk pll1_sysclk1 = {
> @@ -98,15 +99,22 @@ static struct clk vpbe_clk = {
> .flags = CLK_PLL,
> };
>
> -static struct clk vpss_clk = {
> - .name = "vpss",
> +static struct clk vpss_master_clk = {
> + .name = "vpss_master",
> .parent = &pll1_sysclk4,
> - .flags = CLK_PLL,
> + .lpsc = DAVINCI_LPSC_VPSSMSTR,
> };
>
> +static struct clk vpss_slave_clk = {
> + .name = "vpss_slave",
> + .parent = &pll1_sysclk4,
> + .lpsc = DAVINCI_LPSC_VPSSSLV,
> +};
> +
> +
> static struct clk clkout1_clk = {
> .name = "clkout1",
> - .parent = &aux_clk,
> + .parent = &pll1_aux_clk,
> .flags = CLK_PLL,
> /* NOTE: clkout1 can be externally gated by muxing GPIO-18 */
> };
> @@ -155,8 +163,6 @@ static struct clk arm_clk = {
> /*
> * NOT LISTED below, but turned on by PSC init:
> * - in SyncReset state by default
> - * .lpsc = DAVINCI_LPSC_VPSSMSTR, .parent = &vpss_clk,
> - * .lpsc = DAVINCI_LPSC_VPSSSLV, .parent = &vpss_clk,
> * .lpsc = DAVINCI_LPSC_TPCC,
> * .lpsc = DAVINCI_LPSC_TPTC0,
> * .lpsc = DAVINCI_LPSC_TPTC1,
> @@ -164,7 +170,7 @@ static struct clk arm_clk = {
> * NOT LISTED below, and not touched by Linux
> * - in SyncReset state by default
> * .lpsc = DAVINCI_LPSC_DDR_EMIF, .parent = &sysclk2_clk,
> - * .lpsc = DM355_LPSC_RT0, .parent = &aux_clk,
> + * .lpsc = DM355_LPSC_RT0, .parent = &pll1_aux_clk,
> * .lpsc = DAVINCI_LPSC_MEMSTICK,
> * .lpsc = 41, .parent = &vpss_clk, // VPSS DAC
> * - in Enabled state by default
> @@ -186,13 +192,13 @@ static struct clk mjcp_clk = {
>
> static struct clk uart0_clk = {
> .name = "uart0",
> - .parent = &aux_clk,
> + .parent = &pll1_aux_clk,
> .lpsc = DAVINCI_LPSC_UART0,
> };
>
> static struct clk uart1_clk = {
> .name = "uart1",
> - .parent = &aux_clk,
> + .parent = &pll1_aux_clk,
> .lpsc = DAVINCI_LPSC_UART1,
> };
>
> @@ -204,7 +210,7 @@ static struct clk uart2_clk = {
>
> static struct clk i2c_clk = {
> .name = "I2CCLK",
> - .parent = &aux_clk,
> + .parent = &pll1_aux_clk,
> .lpsc = DAVINCI_LPSC_I2C,
> };
>
> @@ -259,54 +265,53 @@ static struct clk aemif_clk = {
> .name = "aemif",
> .parent = &pll1_sysclk2,
> .lpsc = DAVINCI_LPSC_AEMIF,
> - .usecount = 1,
> };
>
> static struct clk pwm0_clk = {
> .name = "pwm0",
> - .parent = &aux_clk,
> + .parent = &pll1_aux_clk,
> .lpsc = DAVINCI_LPSC_PWM0,
> };
>
> static struct clk pwm1_clk = {
> .name = "pwm1",
> - .parent = &aux_clk,
> + .parent = &pll1_aux_clk,
> .lpsc = DAVINCI_LPSC_PWM1,
> };
>
> static struct clk pwm2_clk = {
> .name = "pwm2",
> - .parent = &aux_clk,
> + .parent = &pll1_aux_clk,
> .lpsc = DAVINCI_LPSC_PWM2,
> };
>
> static struct clk pwm3_clk = {
> .name = "pwm3",
> - .parent = &aux_clk,
> + .parent = &pll1_aux_clk,
> .lpsc = DM355_LPSC_PWM3,
> };
>
> static struct clk timer0_clk = {
> .name = "timer0",
> - .parent = &aux_clk,
> + .parent = &pll1_aux_clk,
> .lpsc = DAVINCI_LPSC_TIMER0,
> };
>
> static struct clk timer1_clk = {
> .name = "timer1",
> - .parent = &aux_clk,
> + .parent = &pll1_aux_clk,
> .lpsc = DAVINCI_LPSC_TIMER1,
> };
>
> static struct clk timer2_clk = {
> .name = "timer2",
> - .parent = &aux_clk,
> + .parent = &pll1_aux_clk,
> .lpsc = DAVINCI_LPSC_TIMER2,
> };
>
> static struct clk timer3_clk = {
> .name = "timer3",
> - .parent = &aux_clk,
> + .parent = &pll1_aux_clk,
> .lpsc = DM355_LPSC_TIMER3,
> };
>
> @@ -318,15 +323,16 @@ static struct clk usb_clk = {
>
> static struct clk *dm355_clks[] __initdata = {
> &ref_clk,
> + &pll1_aux_clk,
> &pll1_clk,
> - &aux_clk,
> + &pll1_sysclkbp,
> &pll1_sysclk1,
> &pll1_sysclk2,
> &pll1_sysclk3,
> &pll1_sysclk4,
> - &pll1_sysclkbp,
> &vpbe_clk,
> - &vpss_clk,
> + &vpss_master_clk,
> + &vpss_slave_clk,
> &clkout1_clk,
> &clkout2_clk,
> &pll2_clk,
> --- a/arch/arm/mach-davinci/dm644x.c
> +++ b/arch/arm/mach-davinci/dm644x.c
> @@ -37,6 +37,13 @@ static struct clk ref_clk = {
> .flags = CLK_PLL,
> };
>
> +static struct clk pll1_aux_clk = {
> + .name = "pll1_aux_clk",
> + .parent = &ref_clk,
> + .flags = CLK_PLL,
> + /* gated by PLL1 CKEN.AUXEN */
> +};
> +
> static struct clk pll1_clk = {
> .name = "pll1",
> .parent = &ref_clk,
> @@ -107,21 +114,39 @@ static struct clk arm_clk = {
> .flags = ALWAYS_ENABLED,
> };
>
> +static struct clk vicp_clk = {
> + .name = "vicp",
> + .parent = &pll1_sysclk2,
> + .lpsc = DAVINCI_LPSC_IMCOP,
> +};
> +
> +static struct clk vpss_master_clk = {
> + .name = "vpss_master",
> + .parent = &pll1_sysclk3,
> + .lpsc = DAVINCI_LPSC_VPSSMSTR,
> +};
> +
> +static struct clk vpss_slave_clk = {
> + .name = "vpss_slave",
> + .parent = &pll1_sysclk3,
> + .lpsc = DAVINCI_LPSC_VPSSSLV,
> +};
> +
> static struct clk uart0_clk = {
> .name = "uart0",
> - .parent = &ref_clk,
> + .parent = &pll1_aux_clk,
> .lpsc = DAVINCI_LPSC_UART0,
> };
>
> static struct clk uart1_clk = {
> .name = "uart1",
> - .parent = &ref_clk,
> + .parent = &pll1_aux_clk,
> .lpsc = DAVINCI_LPSC_UART1,
> };
>
> static struct clk uart2_clk = {
> .name = "uart2",
> - .parent = &ref_clk,
> + .parent = &pll1_aux_clk,
> .lpsc = DAVINCI_LPSC_UART2,
> };
>
> @@ -133,7 +158,7 @@ static struct clk emac_clk = {
>
> static struct clk i2c_clk = {
> .name = "I2CCLK",
> - .parent = &ref_clk,
> + .parent = &pll1_aux_clk,
> .lpsc = DAVINCI_LPSC_I2C,
> };
>
> @@ -186,26 +211,45 @@ static struct clk aemif_clk = {
> .flags = ALWAYS_ENABLED,
> };
>
> +static struct clk pwm0_clk = {
> + .name = "pwm0",
> + .parent = &pll1_aux_clk,
> + .lpsc = DAVINCI_LPSC_PWM0,
> +};
> +
> +static struct clk pwm1_clk = {
> + .name = "pwm1",
> + .parent = &pll1_aux_clk,
> + .lpsc = DAVINCI_LPSC_PWM1,
> +};
> +
> +static struct clk pwm2_clk = {
> + .name = "pwm2",
> + .parent = &pll1_aux_clk,
> + .lpsc = DAVINCI_LPSC_PWM2,
> +};
> +
> static struct clk timer0_clk = {
> .name = "timer0",
> - .parent = &ref_clk,
> + .parent = &pll1_aux_clk,
> .lpsc = DAVINCI_LPSC_TIMER0,
> };
>
> static struct clk timer1_clk = {
> .name = "timer1",
> - .parent = &ref_clk,
> + .parent = &pll1_aux_clk,
> .lpsc = DAVINCI_LPSC_TIMER1,
> };
>
> static struct clk timer2_clk = {
> .name = "timer2",
> - .parent = &ref_clk,
> + .parent = &pll1_aux_clk,
> .lpsc = DAVINCI_LPSC_TIMER2,
> };
>
> static struct clk *dm644x_clks[] __initdata = {
> &ref_clk,
> + &pll1_aux_clk,
> &pll1_clk,
> &pll1_sysclk1,
> &pll1_sysclk2,
> @@ -214,7 +258,11 @@ static struct clk *dm644x_clks[] __initd
> &pll2_clk,
> &pll2_sysclk1,
> &pll2_sysclk2,
> + &pll2_sysclkbp,
> &arm_clk,
> + &vicp_clk,
> + &vpss_master_clk,
> + &vpss_slave_clk,
> &uart0_clk,
> &uart1_clk,
> &uart2_clk,
> @@ -228,6 +276,9 @@ static struct clk *dm644x_clks[] __initd
> &usb_clk,
> &vlynq_clk,
> &aemif_clk,
> + &pwm0_clk,
> + &pwm1_clk,
> + &pwm2_clk,
> &timer0_clk,
> &timer1_clk,
> &timer2_clk,
> --- a/arch/arm/mach-davinci/dm646x.c
> +++ b/arch/arm/mach-davinci/dm646x.c
> @@ -138,19 +138,19 @@ static struct clk arm_clk = {
>
> static struct clk uart0_clk = {
> .name = "uart0",
> - .parent = &aux_clk,
> + .parent = &pll1_sysclk3,
> .lpsc = DM646X_LPSC_UART0,
> };
>
> static struct clk uart1_clk = {
> .name = "uart1",
> - .parent = &aux_clk,
> + .parent = &pll1_sysclk3,
> .lpsc = DM646X_LPSC_UART1,
> };
>
> static struct clk uart2_clk = {
> .name = "uart2",
> - .parent = &aux_clk,
> + .parent = &pll1_sysclk3,
> .lpsc = DM646X_LPSC_UART2,
> };
>
> @@ -179,6 +179,18 @@ static struct clk emac_clk = {
> .lpsc = DM646X_LPSC_EMAC,
> };
>
> +static struct clk pwm0_clk = {
> + .name = "pwm0",
> + .parent = &pll1_sysclk3,
> + .lpsc = DM646X_LPSC_PWM0,
> +};
> +
> +static struct clk pwm1_clk = {
> + .name = "pwm1",
> + .parent = &pll1_sysclk3,
> + .lpsc = DM646X_LPSC_PWM1,
> +};
> +
> static struct clk timer0_clk = {
> .name = "timer0",
> .parent = &pll1_sysclk3,
> @@ -213,6 +225,8 @@ static struct clk *dm646x_clks[] __initd
> &gpio_clk,
> &aemif_clk,
> &emac_clk,
> + &pwm0_clk,
> + &pwm1_clk,
> &timer0_clk,
> &timer1_clk,
> NULL,
> --- a/arch/arm/mach-davinci/psc.c
> +++ b/arch/arm/mach-davinci/psc.c
> @@ -182,10 +182,6 @@ void __init davinci_psc_init(void)
>
> if (cpu_is_davinci_dm644x() || cpu_is_davinci_dm355()) {
> davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN,
> - DAVINCI_LPSC_VPSSMSTR, 1);
> - davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN,
> - DAVINCI_LPSC_VPSSSLV, 1);
> - davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN,
> DAVINCI_LPSC_TPCC, 1);
> davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN,
> DAVINCI_LPSC_TPTC0, 1);
> --- a/drivers/mtd/nand/davinci_nand.c
> +++ b/drivers/mtd/nand/davinci_nand.c
> @@ -469,16 +469,16 @@ static int __init nand_davinci_probe(str
> info->chip.ecc.mode = NAND_ECC_SOFT;
> }
>
> - info->clk = clk_get(&pdev->dev, "AEMIFCLK");
> + info->clk = clk_get(&pdev->dev, "aemif");
> if (IS_ERR(info->clk)) {
> ret = PTR_ERR(info->clk);
> - dev_dbg(&pdev->dev, "unable to get AEMIFCLK, err %d\n", ret);
> + dev_dbg(&pdev->dev, "unable to get AEMIF clock, err %d\n", ret);
> goto err_clk;
> }
>
> ret = clk_enable(info->clk);
> if (ret < 0) {
> - dev_dbg(&pdev->dev, "unable to enable AEMIFCLK, err %d\n", ret);
> + dev_dbg(&pdev->dev, "unable to enable AEMIF clock, err %d\n",
> ret);
> goto err_clk_enable;
> }
>
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