Hi Prabhakar,
On Mon, 12 May 2025 at 20:23, Prabhakar <prabhakar.cse...@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad...@bp.renesas.com>
>
> Update the RZ/G2L MIPI DSI driver to calculate HSFREQ using the actual
> VCLK rate instead of the mode clock. The relationship between HSCLK and
> VCLK is:
>
> vclk * bpp <= hsclk * 8 * lanes
>
> Retrieve the VCLK rate using `clk_get_rate(dsi->vclk)`, ensuring that
> HSFREQ accurately reflects the clock rate set in hardware, leading to
> better precision in data transmission.
>
> Additionally, use `DIV_ROUND_CLOSEST_ULL` for a more precise division
> when computing `hsfreq`. Also, update unit conversions to use correct
> scaling factors for better clarity and correctness.
>
> Since `clk_get_rate()` returns the clock rate in Hz, update the HSFREQ
> threshold comparisons to use Hz instead of kHz to ensure correct behavior.
>
> Co-developed-by: Fabrizio Castro <fabrizio.castro...@renesas.com>
> Signed-off-by: Fabrizio Castro <fabrizio.castro...@renesas.com>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad...@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das...@bp.renesas.com>
> ---
> v4->v5:
> - Added dev_info() to print the VCLK rate if it doesn't match the
> requested rate.
> - Added Reviewed-by tag from Biju
>
> v3->v4:
> - Used MILLI instead of KILO
Thanks for the update!
> --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> @@ -269,6 +271,12 @@ static int rzg2l_mipi_dsi_startup(struct rzg2l_mipi_dsi
> *dsi,
> u32 golpbkt;
> int ret;
>
> + ret = pm_runtime_resume_and_get(dsi->dev);
> + if (ret < 0)
> + return ret;
> +
> + clk_set_rate(dsi->vclk, mode->clock * MILLI);
drm_display_mode.clock is in kHz, so s/MILLI/KILO/
> +
> /*
> * Relationship between hsclk and vclk must follow
> * vclk * bpp = hsclk * 8 * lanes
> @@ -280,13 +288,11 @@ static int rzg2l_mipi_dsi_startup(struct rzg2l_mipi_dsi
> *dsi,
> * hsclk(bit) = hsclk(byte) * 8 = hsfreq
> */
> bpp = mipi_dsi_pixel_format_to_bpp(dsi->format);
> - hsfreq = (mode->clock * bpp) / dsi->lanes;
> -
> - ret = pm_runtime_resume_and_get(dsi->dev);
> - if (ret < 0)
> - return ret;
> -
> - clk_set_rate(dsi->vclk, mode->clock * 1000);
> + vclk_rate = clk_get_rate(dsi->vclk);
> + if (vclk_rate != mode->clock * MILLI)
> + dev_info(dsi->dev, "Requested vclk rate %lu, actual %lu
> mismatch\n",
> + mode->clock * MILLI, vclk_rate);
Likewise.
> + hsfreq = DIV_ROUND_CLOSEST_ULL(vclk_rate * bpp, dsi->lanes);
>
> ret = rzg2l_mipi_dsi_dphy_init(dsi, hsfreq);
> if (ret < 0)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
