On Thu, May 15, 2025 at 04:33:40PM +0300, Alexander Usyskin wrote:
> GSC NVM controller HW errors on quad access overlapping 1K border.
> Align 64bit read and write to avoid readq/writeq over 1K border.
> 
> Acked-by: Miquel Raynal <miquel.ray...@bootlin.com>
> Signed-off-by: Alexander Usyskin <alexander.usys...@intel.com>
> ---
>  drivers/mtd/devices/mtd_intel_dg.c | 35 ++++++++++++++++++++++++++++++
>  1 file changed, 35 insertions(+)
> 
> diff --git a/drivers/mtd/devices/mtd_intel_dg.c 
> b/drivers/mtd/devices/mtd_intel_dg.c
> index eedc0974bb5b..2f32ed311ffd 100644
> --- a/drivers/mtd/devices/mtd_intel_dg.c
> +++ b/drivers/mtd/devices/mtd_intel_dg.c
> @@ -246,6 +246,24 @@ static ssize_t idg_write(struct intel_dg_nvm *nvm, u8 
> region,
>               len_s -= to_shift;
>       }
>  
> +     if (!IS_ALIGNED(to, sizeof(u64)) &&
> +         ((to ^ (to + len_s)) & GENMASK(31, 10))) {
> +             /*
> +              * Workaround reads/writes across 1k-aligned addresses
> +              * (start u32 before 1k, end u32 after)
> +              * as this fails on hardware.

If there's a spec definition, we usually mention workarounds with
Wa_ID:platform so that they're easy to track. intel_workarounds.c
is good reference for it.

> +              */
> +             u32 data;
> +
> +             memcpy(&data, &buf[0], sizeof(u32));
> +             idg_nvm_write32(nvm, to, data);
> +             if (idg_nvm_error(nvm))
> +                     return -EIO;
> +             buf += sizeof(u32);
> +             to += sizeof(u32);
> +             len_s -= sizeof(u32);
> +     }
> +
>       len8 = ALIGN_DOWN(len_s, sizeof(u64));
>       for (i = 0; i < len8; i += sizeof(u64)) {
>               u64 data;
> @@ -303,6 +321,23 @@ static ssize_t idg_read(struct intel_dg_nvm *nvm, u8 
> region,
>               from += from_shift;
>       }
>  
> +     if (!IS_ALIGNED(from, sizeof(u64)) &&
> +         ((from ^ (from + len_s)) & GENMASK(31, 10))) {
> +             /*
> +              * Workaround reads/writes across 1k-aligned addresses
> +              * (start u32 before 1k, end u32 after)
> +              * as this fails on hardware.
> +              */
> +             u32 data = idg_nvm_read32(nvm, from);
> +
> +             if (idg_nvm_error(nvm))
> +                     return -EIO;
> +             memcpy(&buf[0], &data, sizeof(data));
> +             len_s -= sizeof(u32);
> +             buf += sizeof(u32);
> +             from += sizeof(u32);
> +     }
> +
>       len8 = ALIGN_DOWN(len_s, sizeof(u64));
>       for (i = 0; i < len8; i += sizeof(u64)) {
>               u64 data = idg_nvm_read64(nvm, from + i);
> -- 
> 2.43.0
> 

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