On Tuesday, August 19, 2025 9:16 PM Svyatoslav Ryhel wrote: > Tegra30 has CSI PAD clock enable bits embedded into PLLD/PLLD2 registers. > Add ids for these clocks. > > Signed-off-by: Svyatoslav Ryhel <clamo...@gmail.com> > --- > include/dt-bindings/clock/tegra30-car.h | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/include/dt-bindings/clock/tegra30-car.h > b/include/dt-bindings/clock/tegra30-car.h index f193663e6f28..14b83e90a0fc > 100644 > --- a/include/dt-bindings/clock/tegra30-car.h > +++ b/include/dt-bindings/clock/tegra30-car.h > @@ -271,6 +271,8 @@ > #define TEGRA30_CLK_AUDIO3_MUX 306 > #define TEGRA30_CLK_AUDIO4_MUX 307 > #define TEGRA30_CLK_SPDIF_MUX 308 > -#define TEGRA30_CLK_CLK_MAX 309 > +#define TEGRA30_CLK_CSIA_PAD 309 > +#define TEGRA30_CLK_CSIB_PAD 310 > +#define TEGRA30_CLK_CLK_MAX 311 > > #endif /* _DT_BINDINGS_CLOCK_TEGRA30_CAR_H */
The commit message refers to tegra20, but contents are tegra30. Regarding the CLK_MAX define, I agree that it would be better to get rid of it. Perhaps you can check if it would be reasonable to calculate it dynamically in the driver, but a define and sanity check in the driver would work too, I think. Cheers, Mikko
