Currently GpuInfo reports the interconnect coherency protocol as none without actually reading the `COHERENCY_ENABLE` register.
Although the result is the same, write `NO_COHERENCY` to the register during probe and then read back the register to populate the GpuInfo struct. This ensures that GpuInfo is populated consistently and is always as accurate as possible by reporting the register values directly. Signed-off-by: Deborah Brouwer <[email protected]> --- drivers/gpu/drm/tyr/driver.rs | 6 ++++++ drivers/gpu/drm/tyr/gpu.rs | 2 +- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/tyr/driver.rs b/drivers/gpu/drm/tyr/driver.rs index 10c212a3a01910858f02c6d637edff8a263f017b..b2147c305bacf081caf028866811b902cf7b9182 100644 --- a/drivers/gpu/drm/tyr/driver.rs +++ b/drivers/gpu/drm/tyr/driver.rs @@ -138,6 +138,12 @@ fn probe( issue_soft_reset(pdev.as_ref(), &iomem)?; gpu::l2_power_on(pdev.as_ref(), &iomem)?; + let io = (*iomem).access(pdev.as_ref())?; + io.write_val( + COHERENCY_ENABLE::zeroed() + .with_const_l2_cache_protocol_select::<{ COHERENCY_ENABLE::NO_COHERENCY }>(), + ); + let gpu_info = GpuInfo::new(pdev.as_ref(), &iomem)?; gpu_info_log(pdev.as_ref(), &iomem)?; diff --git a/drivers/gpu/drm/tyr/gpu.rs b/drivers/gpu/drm/tyr/gpu.rs index 51a250570f375e12bb0f7fb32f047bf219ef9b70..9f572ccffd11a7ea1872a1e4e1c88f78fd6cad29 100644 --- a/drivers/gpu/drm/tyr/gpu.rs +++ b/drivers/gpu/drm/tyr/gpu.rs @@ -55,7 +55,7 @@ pub(crate) fn new(dev: &Device<Bound>, iomem: &Devres<IoMem>) -> Result<Self> { // TODO: Add texture_features_{1,2,3}. texture_features: [io.read(TEXTURE_FEATURES_0).into_raw(), 0, 0, 0], as_present: io.read(AS_PRESENT).into_raw(), - selected_coherency: uapi::drm_panthor_gpu_coherency_DRM_PANTHOR_GPU_COHERENCY_NONE, + selected_coherency: io.read(COHERENCY_ENABLE).into_raw(), shader_present: io.read(SHADER_PRESENT).into_raw(), l2_present: io.read(L2_PRESENT).into_raw(), tiler_present: io.read(TILER_PRESENT).into_raw(), -- 2.52.0
