Introduce ATMEL_HLCDC_CLKDIV_MAX to replace the raw mask.In the divider overflow fallback, restrict the clock source switch and halved rate retry to SoCs that support the 2x system clock path.
Signed-off-by: Manikandan Muralidharan <[email protected]> --- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 9 +++++---- include/linux/mfd/atmel-hlcdc.h | 1 + 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c index f30138da1ed8..c7e77bb2941a 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c @@ -117,11 +117,12 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c) div = 2; } else if (ATMEL_HLCDC_CLKDIV(div) & ~ATMEL_HLCDC_CLKDIV_MASK) { /* The divider ended up too big, try a lower base rate. */ - cfg &= ~ATMEL_HLCDC_CLKSEL; - prate /= 2; - div = DIV_ROUND_CLOSEST(prate, mode_rate); + if (!crtc->dc->desc->fixed_clksrc) { + cfg &= ~ATMEL_HLCDC_CLKSEL; + div = DIV_ROUND_CLOSEST(prate >> 1, mode_rate); + } if (ATMEL_HLCDC_CLKDIV(div) & ~ATMEL_HLCDC_CLKDIV_MASK) - div = ATMEL_HLCDC_CLKDIV_MASK; + div = ATMEL_HLCDC_CLKDIV_MAX; } cfg |= ATMEL_HLCDC_CLKDIV(div); diff --git a/include/linux/mfd/atmel-hlcdc.h b/include/linux/mfd/atmel-hlcdc.h index 07c2081867fd..8e86219293b7 100644 --- a/include/linux/mfd/atmel-hlcdc.h +++ b/include/linux/mfd/atmel-hlcdc.h @@ -50,6 +50,7 @@ #define ATMEL_HLCDC_CLKDIV_SHFT 16 #define ATMEL_HLCDC_CLKDIV_MASK GENMASK(23, 16) #define ATMEL_HLCDC_CLKDIV(div) ((div - 2) << ATMEL_HLCDC_CLKDIV_SHFT) +#define ATMEL_HLCDC_CLKDIV_MAX ((ATMEL_HLCDC_CLKDIV_MASK >> ATMEL_HLCDC_CLKDIV_SHFT) + 2) #define ATMEL_HLCDC_PIXEL_CLK BIT(0) #define ATMEL_HLCDC_SYNC BIT(1) -- 2.25.1
