Document the VOP2 resets corresponding to the AXI, AHB and DCLK_VP0..2 clocks, which are common to all supported SoCs, plus DCLK_VP3 which is provided only on RK3588.
Signed-off-by: Cristian Ciocaltea <[email protected]> --- .../bindings/display/rockchip/rockchip-vop2.yaml | 42 ++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml index 93da1fb9adc4..d3bc5380f910 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml @@ -82,6 +82,20 @@ properties: - {} - {} + resets: + minItems: 5 + maxItems: 6 + + reset-names: + minItems: 5 + items: + - const: axi + - const: ahb + - const: dclk_vp0 + - const: dclk_vp1 + - const: dclk_vp2 + - const: dclk_vp3 + rockchip,grf: $ref: /schemas/types.yaml#/definitions/phandle description: @@ -148,6 +162,12 @@ allOf: clock-names: maxItems: 5 + resets: + maxItems: 5 + + reset-names: + maxItems: 5 + interrupts: maxItems: 1 @@ -194,6 +214,12 @@ allOf: - {} - const: pll_hdmiphy0 + resets: + maxItems: 5 + + reset-names: + maxItems: 5 + interrupts: minItems: 4 @@ -246,6 +272,12 @@ allOf: - const: pll_hdmiphy0 - const: pll_hdmiphy1 + resets: + minItems: 6 + + reset-names: + minItems: 6 + interrupts: maxItems: 1 @@ -289,6 +321,16 @@ examples: "dclk_vp0", "dclk_vp1", "dclk_vp2"; + resets = <&cru SRST_A_VOP>, + <&cru SRST_H_VOP>, + <&cru SRST_VOP0>, + <&cru SRST_VOP1>, + <&cru SRST_VOP2>; + reset-names = "axi", + "ahb", + "dclk_vp0", + "dclk_vp1", + "dclk_vp2"; power-domains = <&power RK3568_PD_VO>; rockchip,grf = <&grf>; iommus = <&vop_mmu>; -- 2.54.0
