The argument in the previous patch applies, with the following
differences:
- CpuMpDxe is theoretically capable of adding register entries (MSR, CRn
changes etc) to these tables. See the following call tree in CpuMpDxe:
ProduceRegisterTable()
MaxCpuidLimitReg()
WriteRegisterTable(
..., MSR_IA32_MISC_ENABLE, N_MSR_LIMIT_CPUID_MAXVAL, ...
)
XdReg()
WriteRegisterTable(
..., MSR_IA32_MISC_ENABLE, N_MSR_XD_BIT_DISABLE, ...
)
However, both MaxCpuidLimitReg() and XdReg() are gated by feature PCDs;
we'll just consider those disabled.
- Unlike ACPI_CPU_DATA.PreSmmInitRegisterTable,
ACPI_CPU_DATA.RegisterTable is correctly stashed by PiSmmCpuDxeSmm in
SMRAM (part of the code being removed), therefore this patch has no
security impact.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <[email protected]>
---
OvmfPkg/QuarkPort/Include/AcpiCpuData.h | 1 -
OvmfPkg/QuarkPort/PiSmmCpuDxeSmm/CpuS3.c | 26 --------------------
OvmfPkg/QuarkPort/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 17 -------------
3 files changed, 44 deletions(-)
diff --git a/OvmfPkg/QuarkPort/Include/AcpiCpuData.h
b/OvmfPkg/QuarkPort/Include/AcpiCpuData.h
index 429c611..5fe19a4 100644
--- a/OvmfPkg/QuarkPort/Include/AcpiCpuData.h
+++ b/OvmfPkg/QuarkPort/Include/AcpiCpuData.h
@@ -42,7 +42,6 @@ typedef struct {
UINT32 StackSize;
UINT32 NumberOfCpus;
EFI_PHYSICAL_ADDRESS MtrrTable;
- EFI_PHYSICAL_ADDRESS RegisterTable;
EFI_PHYSICAL_ADDRESS ApMachineCheckHandlerBase;
UINT32 ApMachineCheckHandlerSize;
} ACPI_CPU_DATA;
diff --git a/OvmfPkg/QuarkPort/PiSmmCpuDxeSmm/CpuS3.c
b/OvmfPkg/QuarkPort/PiSmmCpuDxeSmm/CpuS3.c
index 2072f1c..0d43df5 100644
--- a/OvmfPkg/QuarkPort/PiSmmCpuDxeSmm/CpuS3.c
+++ b/OvmfPkg/QuarkPort/PiSmmCpuDxeSmm/CpuS3.c
@@ -255,22 +255,9 @@ MPRendezvousProcedure (
VOID
)
{
- CPU_REGISTER_TABLE *RegisterTableList;
- UINT32 InitApicId;
- UINTN Index;
-
ProgramVirtualWireMode ();
DisableLvtInterrupts ();
- RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN)
mAcpiCpuData.RegisterTable;
- InitApicId = GetInitialApicId ();
- for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) {
- if (RegisterTableList[Index].InitialApicId == InitApicId) {
- SetProcessorRegister (&RegisterTableList[Index]);
- break;
- }
- }
-
//
// Count down the number with lock mechanism.
//
@@ -382,19 +369,6 @@ InitializeCpu (
VOID
)
{
- CPU_REGISTER_TABLE *RegisterTableList;
- UINT32 InitApicId;
- UINTN Index;
-
- RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN)
mAcpiCpuData.RegisterTable;
- InitApicId = GetInitialApicId ();
- for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) {
- if (RegisterTableList[Index].InitialApicId == InitApicId) {
- SetProcessorRegister (&RegisterTableList[Index]);
- break;
- }
- }
-
mNumberToFinish = mAcpiCpuData.NumberOfCpus - 1;
mExchangeInfo->ApFunction = (VOID *) (UINTN) MPRendezvousProcedure;
diff --git a/OvmfPkg/QuarkPort/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
b/OvmfPkg/QuarkPort/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
index 62ed446..ba8d25c 100644
--- a/OvmfPkg/QuarkPort/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
+++ b/OvmfPkg/QuarkPort/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
@@ -964,9 +964,6 @@ SmmReadyToLockEventNotify (
IN EFI_HANDLE Handle
)
{
- UINTN Index;
- CPU_REGISTER_TABLE *SourceRegisterTableList;
- CPU_REGISTER_TABLE *DestinationRegisterTableList;
ACPI_CPU_DATA *AcpiCpuData;
IA32_DESCRIPTOR *Gdtr;
IA32_DESCRIPTOR *Idtr;
@@ -1000,20 +997,6 @@ SmmReadyToLockEventNotify (
CopyMem ((VOID *)(UINTN)mAcpiCpuData.IdtrProfile, (VOID
*)(UINTN)AcpiCpuData->IdtrProfile, sizeof (IA32_DESCRIPTOR));
- mAcpiCpuData.RegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePool
(mAcpiCpuData.NumberOfCpus * sizeof (CPU_REGISTER_TABLE));
- ASSERT (mAcpiCpuData.RegisterTable != 0);
-
- CopyMem ((CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.RegisterTable,
(CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->RegisterTable,
mAcpiCpuData.NumberOfCpus * sizeof (CPU_REGISTER_TABLE));
-
- SourceRegisterTableList = (CPU_REGISTER_TABLE
*)(UINTN)AcpiCpuData->RegisterTable;
- DestinationRegisterTableList = (CPU_REGISTER_TABLE
*)(UINTN)mAcpiCpuData.RegisterTable;
- for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) {
- DestinationRegisterTableList[Index].RegisterTableEntry = AllocatePool
(DestinationRegisterTableList[Index].AllocatedSize);
- ASSERT (DestinationRegisterTableList[Index].RegisterTableEntry != NULL);
-
- CopyMem (DestinationRegisterTableList[Index].RegisterTableEntry,
SourceRegisterTableList[Index].RegisterTableEntry,
DestinationRegisterTableList[Index].AllocatedSize);
- }
-
//
// Copy AP's GDT, IDT and Machine Check handler into SMRAM.
//
--
1.8.3.1
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