On Thu, Dec 4, 2008 at 2:23 PM, Bill W4ZV <[EMAIL PROTECTED]> wrote:
>
> Nico, this is truly exceptional phase noise performance!  My sincerest
> congratulations to you.  Have you described how you achieved this somewhere?
>
> 73,  Bill  W4ZV
>

Not to speak for Nico, but direct sampling SDRs use a crystal
oscillator for the ADC encode clock which obviously can be built to
have very good phase noise.  The LO generation and mixing is all done
in the digital domain in the FPGA so there is no degradation of the
crystal oscillator's original phase noise specs.  This is not always
the case for DDS/QSD based SDRs due to reasons described earlier.

73 Phil N8VB
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