On Monday 05 November 2007, Jon Elson wrote: >Kenneth Lerman wrote: >> Steve, >> >> The problem with a filter is that it introduces a delay. So a two-tap >> filter would introduce a delay of at least one servo cycle. Is that better >> or worse than just halving the servo cycle? Could feedforward compensate >> for that? > >No, if you set up the order of the processes correctly in the >script that installs the hal components, there is actually NOT a >total delay of all frequency components. You would set it up so >that the servo thread reads the encoders, then does the PID, >then the filter, then the selected servo output. This is in the >addf commands in ..../configs/univpwm/univpwm_load.hal, for >instance. > >The filter takes the current input times a coefficient, then >adds several previous samples times their coefficients. >Depending on how much each sample is weighted, there would be >more delay on the lower frequency components with a low-pass >filter. I'll have to see how this works. Since it is filtering >the command OUTPUT of the PID, it shouldn't increase error that >much, IF you can make the loop stable. > >I'll have to think about the notch filter vs. low-pass filter >thing. Maybe I really want a notch filter at 1/2 the sample rate. > >Jon
Some food for thought Jon, although I don't expect it to be called new. In tv, we use, in the better tv's, a 'comb' filter to separate the luminance from the chroma. It works as a 3 tap delay line where the first and last tap each supply 25% of the output signal, and the center tap supplies 50%. The two mixed signals are then obtained by adding the first and last tap, and subtracting the center tap to recover the 3.58mhz chroma signal, and adding the center tap to recover the luminance signal. There are two ways to do this in a tv. If the delay is 63.333 u-secs for each delay, then a very good vertical resolution enhancement can also be done, but if the delays are only 135ns, or half a color subcarrier cycle, only the horizontal resolution is enhanced. The longer delay was at one time done in very expensive glass acoustic delay lines, so that was only available in high end studio monitors. I believe that may be available in silicon now but have no actual knowledge to back that up. This same idea done digitally by a parallel transfer between 3 8 bit latches, clocking it by the same clock as the sample clock, could do a very good job of removing the 1/2 sample noise if the output was from an 8 bit digital adder. Much faster that way than in cpu cycles although it could be done if the sample rate was low enough. 1khz at 32 bits resolution is certainly doable by the cpu, maybe 10khz with good coding. Just throwing the idea out there as its easier to code than hack a board full of TTL stuff. -- Cheers, Gene "There are four boxes to be used in defense of liberty: soap, ballot, jury, and ammo. Please use in that order." -Ed Howdershelt (Author) You will be run over by a bus. ------------------------------------------------------------------------- This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ _______________________________________________ Emc-developers mailing list Emc-developers@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-developers
