On 10/1/2011 8:56 PM, Jon Elson wrote: > Kent A. Reed wrote: > > Oh, there is a Microsoft document that lays out the register spec for > industry-compatible > parallel ports. It defines the extended control register as being 0x402 > higher than the parallel > port base address. So, if the parallel port is at 0x1020, the ECR > should be at 0x1422, and > writing a 0x80 to that port should set it to EPP mode. I don't even see > 1420-1422 declared > as an assigned address on that system, so that might imply a different > register layout, > requiring a custom driver to properly configure the port. > > Hmmm, even the fact that there exists a driver for the board might imply > that is does > NOT conform to the register standard. > > Jon > I feel your pain. What a PITA this whole parallel port business is. All the major hardware and software manufacturers (some still doing business, some not so much) have had their hands in the sausage-making process that delivered IEEE1284. A pox on their houses.
I have test machines and WinXP and up available. It looks like my local MicroCenter has 3 of 'your' SIIG board in stock (http://www.microcenter.com/single_product_results.phtml?product_id=0243424). I have to go there for some other stuff in a few days. I'll pick up the SIIG card as well and see what Windows and Linux can do with it on 1) an aging Dell Dimension 2400, 2) a recent ASUS AT5NM10-I atom m/b, 3) whatever else I can dig up if things get interesting. I'm thinking that the card's PCI signature is just too new for old versions of Windows to recognize it and that's the reason for all the drivers in the SIIG zip file. I'd be surprised if it turns out they provide the driver file because they have a custom register layout. That calls for too much initiative on the part of the chip designer! The Oxford Semi data sheet for their OX12PCI840, a single-chip solution for one PCI to parallel port interface says "[T]o use the Enhanced Parallel Port 'EPP' the mode bits (ECR[7:5]) must be set to '100'. The EPP address and data port registers are compatible with the IEEE 1284 definition." That mode bit code is '80h' once I add in the lower 4 bits. TTFN. Regards, Kent ------------------------------------------------------------------------------ All of the data generated in your IT infrastructure is seriously valuable. Why? It contains a definitive record of application performance, security threats, fraudulent activity, and more. Splunk takes this data and makes sense of it. IT sense. And common sense. http://p.sf.net/sfu/splunk-d2dcopy2 _______________________________________________ Emc-developers mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/emc-developers
