mistakenly only sent to Doug. here ... have one.
Peter > -----Original Message----- > From: Peter L. Tarver > [mailto:[email protected]] > Sent: Wednesday, June 01, 2005 8:23 AM > To: POWELL, DOUG > Subject: RE: PCB inner plane spacing for high pot > withstand > > > > All - > > I recall that UL 746E contains a set of tables > that define the minimum properties set for > generic ANSI grade materials, such as FR-x and G-x, XP ... > > I also recall that these tables may have been > derived from an ASTM standard, though I'm not > certain of the originating standard. Greg > Galuccio might recall more clearly, if he's still around. > > IPC might have a similar set of tables in a standard. > > These tables can be used in establishing a > minimum set of criteria for interlayer electric > strength per mil for a given cured industrial laminate. > > > Regards, > > Peter L. Tarver, PE > [email protected] > > > -----Original Message----- > From: POWELL, DOUG > Sent: Tuesday, May 31, 2005 3:01 PM > > > Chris, > > <deletia> > > While it is true that laminate manufacturers will > have differing information on dielectric > withstand of cured layers. I have found that for > FR-4 using 500V/mil for base material and > 350V/mil for prepreg material is quite adequate. > > -doug > This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. Website: http://www.ieee-pses.org/ To post a message to the list, send your e-mail to [email protected] Instructions: http://listserv.ieee.org/listserv/request/user-guide.html List rules: http://www.ieee-pses.org/listrules.html For help, send mail to the list administrators: Scott Douglas [email protected] Mike Cantwell [email protected] For policy questions, send mail to: Richard Nute: [email protected] Jim Bacher: [email protected] All emc-pstc postings are archived and searchable on the web at: http://www.ieeecommunities.org/emc-pstc
