IMO if you can show no problem with emissions and safety, ESD is not a big problem. 1) Use less than 9 KHz for a clock. 2) Note that the equipment is not complete (a breadboard isn't, after all) and so not subject to the standards for completed equipment. 3) Use a SELV power limited supply.
Cortland KA5S > [Original Message] > From: Piotr Galka <[email protected]> > To: EMC-PSTC <[email protected]>; John Woodgate <[email protected]> > Date: 11/7/2008 8:59:55 AM > Subject: Re: Deviation of Performance Criteria - other question. > > From: "John Woodgate" <[email protected]> > > > And you seem to think that the emissions would be excessive anyway, so > > it's doubtful that you would get a positive report from the Notified Body. > > My main problem is how to make evident in papers that it is CE OK if > education circuits can be ESD damaged because I don't see any solution to > that. > > I should be able to limit the emission just making square being not square > and persuade the pupil that it is really square what they see ;-) > > Regards > > Piotr Galka - This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. Website: http://www.ieee-pses.org/ To post a message to the list, send your e-mail to [email protected] Instructions: http://listserv.ieee.org/request/user-guide.html List rules: http://www.ieee-pses.org/listrules.html For help, send mail to the list administrators: Scott Douglas [email protected] Mike Cantwell [email protected] For policy questions, send mail to: Jim Bacher: [email protected] David Heald: [email protected] All emc-pstc postings are archived and searchable on the web at: http://www.ieeecommunities.org/emc-pstc
