Hi Peter:
Yes, but again depends on test house acceptance.
According to 5.2.1, electric strength tests
apply to solid insulation, not clearance. This
might be hard for a test house to accept.
Also, Table 5B, Part 1, specifies a minimum
test voltage of 500 V rms. For this voltage,
minimum clearance must be 0.08 mm to 0.11 mm,
depending on the field.
Best regards,
Rich
On 1/29/2013 12:27 PM, Peter Merguerian wrote:
Alternatively you can conduct a hipot for operational insulation
Sent from my iPhone
Peter S. Merguerian
[email protected] <mailto:[email protected]>
Go Global Compliance Inc.
www.goglobalcompliance.com <http://www.goglobalcompliance.com>
(408) 931-3303
On Jan 29, 2013, at 12:13 PM, Richard Nute <[email protected]
<mailto:[email protected]>> wrote:
Hi Amund:
Depending on test house acceptance, you can perform
a fault test by shorting the 12 V to the safety
ground. If the result is no shock hazard (which will
be the result), then the Table 2M clearance distances
can be ignored (for both SELV and ELV circuits).
Best regards,
Rich
On 1/29/2013 1:52 AM, Amund Westin wrote:
An IEC/EN 60950-1 issue
Consider a PCB with maximum (secondary) voltage +12VDC. What are the
minimum distance between the 12VDC signal traces and the chassis
ground /safety ground? Do we talk about Table 2M in IEC60950-1?
Because of lack of space, the PCB must maybe be mounted directly to
the chassis surface.
Best regards
Amund
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