jeshua wrote:
> I am looking at the data sheet for that chip:
>
> http://www.datasheetarchive.com/OX16PCI952-datasheet.html#
>
> It states on page 52:
>
> To use the Enhanced Parallel Port (‘EPP’) mode, the mode
> field of the Extended Control Register (ECR[7:5]) must be
> set to ‘100’ using the negotiation steps as defined by the
> IEEE1284 specification
>
> …
>
> The register set is compatible with the Microsoft(R) register
> definition. Assuming that the upper block is located 400h
> above the lower block, the EPP registers are found at
> offset 000-007h and 400-402h.
>
>
> Does anyone know what that actually means? Its a bit over my head.
>   
OK, that says there is a set of three registers that should be at address
0xc450 - 0xc452, but these do not show up in your lspci output.  Possibly
the board remaps the chip's addresses to some smaller range.  I'm not
sure how much farther you can go with this.  If the maker of the board
has deliberately violated the standard device register map, it is going to
be quite hard to find out where they moved them.

I do note that they say bit 0 of the ECR register must be a 1, my pcisetup
program writes a zero there - it writes 0x80 to the ECR.  Probably this
program should actually mask and write 100xxxxx to the register.  I
do have the source code online, if you want to try that.

Also, does this board have the serial EEPROM?  It would be a 93C46 or
93C56-compatible device, and probably a really small chip, no more
than 8 pins.  That EEPROM can be programmed by a utility to
remap the PCI addresses and enable/disable various functions.
If it has the EEPROM (and I'm guessing it does) that would explain
the different register mapping.  You might look for the config program
and see about changing the default settings for the board.  You very likely
would need a Windows machine to use the program.

Jon


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