At 9:37 AM -0700 2/17/04, Pat LaVarre wrote:
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Remember that some hosts don't even make a physical connection to the INTRQ signal - they don't care about the setting of nIEN. Other hosts may want to do some commands in polling mode and may set nIEN=1 when executing those commands.
Aye.
At my desk now, I see o 376 02 floats INTRQ hi, just as selecting the absent device vi o 1F6 does.
When floating hi, INTRQ appears asserted, so here now I can only disable the toggling of INTRQ that could edge-trigger a PIC, I cannot force INTRQ deasserted. That is, I cannot fully disable INTRQ.
This indicates an improperly implemented host controller or interrupt system in your host.
The INTRQ is a level-high assertion, and is level low when not asserted. When nIEN=1, the INTRQ line is in the released state.
If you look at the host termination implementation table, you'll see that hosts are allowed to use either a 10K pull-up or a 6.0K pull-down on the INTRQ line, depending on the level sensed.
In "classic" PC-ATA x86 implementation, the "ide" interrupts are treated as edge triggered and typically implemented with a pull-up resistor.
In some other platforms and HBA's, the interrupt is pulled-down by a resistor and treated as a level interrupt.
If a host treats the interrupt as level and employs a pull-up resistor, then the interrupt will appear to be "asserted" anytime nIEN=1. The host system will need to employ some other means to suppress that apparent assertion.
Since level interrupts are meant to be shared, it is quite odd to implement a pull-up on the input. Many ATA HBA implementations do not provide a means to gate the interrupt propagation to the PCI interrupt pin and simply pass INTRQ's state through at all times. I've even seen HBA chips that pass INTRQ through to PCI even when the chip has not been enabled or the BAR's setup!
Given that such a device may be placed in a shared interrupt environment, i.e., as a card in a PCI chassis that is bridged to a slot in a host computer, it may be impossible for a host to control the interrupt without simultaneously disabling interrupts for everything that shares the same line of its interrupt controller inputs. The only means to control the INTRQ line is at the device in some cases.
--
--------------------- I make stuff go. ---------------------
Larry Barras Apple Computer Inc. 1 Infinite Loop MS: 306-2TC Cupertino, CA 95014 (408) 974-3220
