On 16 Apr, Matthias Schuendehuette wrote:

> Then I tried various combinations of UDMA100/66/33 and wc=0/1 - it 
> nearly doesn't change anything. If WC was enabled, I saw errors 
> concerning tags 0 *and* 1, whereas without write caching only tag=0 was 
> mentioned. I should say that my simple test was a 'tar cvf /dev/null 
> /usr/ports' with /usr/ports on an ATA-partition. Why *Write*Caching has 
> any influence here...???

If it wasn't read only: access time update.

> CPU: AMD Duron(tm) processor (801.82-MHz 686-class CPU)
> real memory  = 268369920 (262080K bytes)

Same here.

> pcib1: <VIA 8363 (Apollo KT133) PCI-PCI (AGP) bridge> \
>       at device 1.0 on pci0

I've an KT133A.

> ...and 'atacontrol cap 0 0' says:

ATA channel 0, Master, device ad0:

ATA/ATAPI revision    5
device model          IC35L060AVER07-0
firmware revision     ER6OA44A
cylinders             16383
heads                 16
sectors/track         63
lba supported         120103200 sectors
lba48 not supported         
dma supported
overlap not supported

Feature                      Support  Enable    Value   Vendor
write cache                    yes      yes
read ahead                     yes      yes
dma queued                     yes      yes     31/1F
SMART                          yes      yes
microcode download             no       no
security                       yes      yes
power management               yes      yes
advanced power management      yes      no      0/00
automatic acoustic management  yes      no      254/FE  128/80

And some general questions not related to the problem:
 - What's the "security" feature?
 - What does {,advanced} power management do?
 - Is there a way to modify the acoustic management setting?
 - We don't have SMART support, right?


                      Loose bits sink chips.

http://www.Leidinger.net                       Alexander @ Leidinger.net
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