Hi David,
The new samples sound really impressive.
I added support for the new mode to my DML code and hope to do some more
extensive testing soon.
I also made a small patch to get the 'energy' of a 700C frame. Hopefully
I got it about right...
Looking at the codec2_encode_700c function I noticed that the indexes
are determined after just one call to the analyse_one_frame function and
that the other 3 frames are analysed after that, but don't influence the
indexes at all anymore.
I might be wrong, but to me it looks like this order introduces 30ms of
latency for no real reason... Would it not be better to just call
analyse_one_frame four times before creating the indexes?
Another thing I was wondering about: Would this method also
significantly improve the modes with a higher bitrate? How good would a
'1300C' mode sound?
Regards,
Jeroen
On 01/13/2017 02:52 AM, David Rowe wrote:
> Hello Lists,
>
> Here is a blog post on the new, and somewhat experimental, Codec 2 700C
> mode:
>
> http://www.rowetel.com/?p=5373
>
> Cheers,
>
> David
>
>
>
> ------------------------------------------------------------------------------
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Index: src/codec2.c
===================================================================
--- src/codec2.c (revision 2964)
+++ src/codec2.c (working copy)
@@ -1873,6 +1873,38 @@
}
}
+/*---------------------------------------------------------------------------*\
+
+ FUNCTION....: codec2_energy_700c
+ AUTHOR......: Jeroen Vreeken
+ DATE CREATED: Jan 2017
+
+ Decodes energy value from encoded bits.
+
+\*---------------------------------------------------------------------------*/
+
+float codec2_energy_700c(struct CODEC2 *c2, const unsigned char * bits)
+{
+ int indexes[4];
+ unsigned int nbit = 0;
+
+ assert(c2 != NULL);
+
+ /* unpack bits from channel ------------------------------------*/
+
+ indexes[0] = unpack_natural_or_gray(bits, &nbit, 9, 0);
+ indexes[1] = unpack_natural_or_gray(bits, &nbit, 9, 0);
+ indexes[2] = unpack_natural_or_gray(bits, &nbit, 4, 0);
+ indexes[3] = unpack_natural_or_gray(bits, &nbit, 6, 0);
+
+ float mean = newamp1_energy_cb[0].cb[indexes[2]];
+ mean -= 10;
+ if (indexes[3] == 0)
+ mean -= 10;
+
+ return powf(10.0, mean/10.0);
+}
+
#endif
/*---------------------------------------------------------------------------*\
@@ -1896,7 +1928,8 @@
(c2->mode == CODEC2_MODE_1300) ||
(c2->mode == CODEC2_MODE_1200) ||
(c2->mode == CODEC2_MODE_700) ||
- (c2->mode == CODEC2_MODE_700B)
+ (c2->mode == CODEC2_MODE_700B) ||
+ (c2->mode == CODEC2_MODE_700C)
);
MODEL model;
float xq_dec[2] = {};
@@ -1944,7 +1977,10 @@
e_index = unpack_natural_or_gray(bits, &nbit, 3, c2->gray);
e = decode_energy(e_index, 3);
}
-
+ if (c2->mode == CODEC2_MODE_700C) {
+ e = codec2_energy_700c(c2, bits);
+ }
+
return e;
}
------------------------------------------------------------------------------
Developer Access Program for Intel Xeon Phi Processors
Access to Intel Xeon Phi processor-based developer platforms.
With one year of Intel Parallel Studio XE.
Training and support from Colfax.
Order your platform today. http://sdm.link/xeonphi
_______________________________________________
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