[Bug target/128162] [17 Regression] wrong code at -O2: vwmacc.vx whose source is the upper half of the accumulator raises SIGILL

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=128162

--- Comment #8 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Pan Li <pa...@gcc.gnu.org>:

https://gcc.gnu.org/g:c3c3977e691a99d0e86d6059d7a4d583f77f89cc

commit r17-5719-gc3c3977e691a99d0e86d6059d7a4d583f77f89cc
Author: Pan Li <pan2...@intel.com>
Date:   Wed Oct 28 10:37:29 2026 +0800

    RISC-V: Disable RVV register overlap for vwmaccsu.vx [PR target/128162]

    Revert the register overlap of the widening multiply-add insn
    vwmaccsu.vx and the related test cases.

    The insn reads the vd as the accumulator with EEW = 2 * SEW, while
    the vs1 and vs2 are read with EEW = SEW.  The section 5.2 of the
    vector spec reserves any encoding in which one vector register
    supplies source operands with two or more different EEWs.  Thus,
    the vs1 and vs2 must not overlap the vd register group, even in the
    highest-numbered part.  For example, below asm dump is reserved as
    the v3 is read with both the EEW = 32 and the EEW = 16.

      vwmaccsu.vx v2,a0,v3   # LMUL = 1, SEW = 16

    This reverts commit(s):
      68ce5148b9b RISC-V: Allow RVV register overlap for vwmaccsu.vx
      4a0bb62b2d4 RISC-V: Add test cases for vwmaccsu.vx reg overlap
      d45a9c006ad RISC-V: Add more test cases for vwmaccsu.vx

            PR target/128162

    gcc/ChangeLog:

            * config/riscv/vector.md: Revert Wvr constraint to the
            early clobber vr.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccsu_vx-i16-m1.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccsu_vx-i16-m2.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccsu_vx-i16-m4.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccsu_vx-i16-mf2.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccsu_vx-i16-mf4.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccsu_vx-i32-m1.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccsu_vx-i32-m2.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccsu_vx-i32-m4.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccsu_vx-i32-mf2.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccsu_vx-i8-m1.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccsu_vx-i8-m2.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccsu_vx-i8-m4.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccsu_vx-i8-mf2.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccsu_vx-i8-mf4.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccsu_vx-i8-mf8.c:
Removed.
            * gcc.target/riscv/rvv/base/pr112431-55.c: Removed.
            * gcc.target/riscv/rvv/base/pr112431-56.c: Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h:
            Remove test helper macros.

    Signed-off-by: Pan Li <pan2...@intel.com>