https://gcc.gnu.org/g:7c3cc53bc4bd218b279ab210ca22aa6fd6d47c83
commit 7c3cc53bc4bd218b279ab210ca22aa6fd6d47c83 Author: Michael Meissner <[email protected]> Date: Mon Oct 20 19:36:04 2025 -0400 Remove -mpower8-internal support. See https://gcc.gnu.org/pipermail/gcc-patches/2025-September/695920.html for more detail about the motavation for this set of patches. This is the ninth patch out of ten that removes the internal -mpower8-internal ISA option, and it changes to use the CPU option support for testing power8 features. I have bootstraped and ran the regression tests for these patches on both little endian and big endian Power servers. Can I check these patches into the trunk? 2025-10-20 Michael Meissner <[email protected]> gcc/ * config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete -mpower8-internal support in favor of using power8 CPU option. (POWERPC_MASKS): Likewise. * config/rs6000/rs6000.cc (rs6000_option_override_internal): Likewise. * config/rs6000/rs6000.h (TARGET_POWER8): New macro. * config/rs6000/rs6000.opt (-mpower8-internal): Remove setting ISA bit. Diff: --- gcc/config/rs6000/rs6000-cpus.def | 2 -- gcc/config/rs6000/rs6000.cc | 4 +--- gcc/config/rs6000/rs6000.h | 2 ++ gcc/config/rs6000/rs6000.opt | 3 +-- 4 files changed, 4 insertions(+), 7 deletions(-) diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def index bc2823762837..233f01e9c615 100644 --- a/gcc/config/rs6000/rs6000-cpus.def +++ b/gcc/config/rs6000/rs6000-cpus.def @@ -89,7 +89,6 @@ fusion here, instead set it in rs6000.cc if we are tuning for a power8 system. */ #define ISA_2_7_MASKS_SERVER (ISA_2_6_MASKS_SERVER \ - | OPTION_MASK_POWER8 \ | OPTION_MASK_P8_VECTOR \ | OPTION_MASK_CRYPTO \ | OPTION_MASK_EFFICIENT_UNALIGNED_VSX \ @@ -170,7 +169,6 @@ | OPTION_MASK_MODULO \ | OPTION_MASK_MULHW \ | OPTION_MASK_NO_UPDATE \ - | OPTION_MASK_POWER8 \ | OPTION_MASK_P8_FUSION \ | OPTION_MASK_P8_VECTOR \ | OPTION_MASK_P9_MINMAX \ diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index fc11dc0ecdef..4e0b7ef7136c 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -3827,9 +3827,7 @@ rs6000_option_override_internal (bool global_init_p) } /* If little-endian, default to -mstrict-align on older processors. */ - if (!BYTES_BIG_ENDIAN - && !(processor_target_table[tune_index].target_enable - & OPTION_MASK_POWER8)) + if (!BYTES_BIG_ENDIAN && !TARGET_POWER8) rs6000_isa_flags |= ~rs6000_isa_flags_explicit & OPTION_MASK_STRICT_ALIGN; /* Add some warnings for VSX. */ diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 42213d998133..1bd2ce53cc7b 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -558,6 +558,8 @@ extern int rs6000_vector_align[]; /* ISA bits that are set via -mcpu=<xxx>, but that do not have an associated switch with the option. */ +#define TARGET_POWER8 \ + ((rs6000_cpu_option_flags & CPU_OPTION_POWER8_MASK) != 0) #define TARGET_POWER9 \ ((rs6000_cpu_option_flags & CPU_OPTION_POWER9_MASK) != 0) #define TARGET_POWER10 \ diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt index 55590c5fe9dd..31852e02aa0f 100644 --- a/gcc/config/rs6000/rs6000.opt +++ b/gcc/config/rs6000/rs6000.opt @@ -483,9 +483,8 @@ Save the TOC in the prologue for indirect calls rather than inline. mvsx-timode Target RejectNegative Undocumented Ignore -;; This option exists only to create its MASK. It is not intended for users. mpower8-internal -Target Undocumented Mask(POWER8) Var(rs6000_isa_flags) Warn(Do not use %<-mpower8-internal%>; use %<-mcpu=power8%> instead) +Target Undocumented WarnRemoved mpower8-fusion Target Mask(P8_FUSION) Var(rs6000_isa_flags)
