https://gcc.gnu.org/g:49a208ad2d0721500f671f90ae835341706ed5d8
commit r16-9199-g49a208ad2d0721500f671f90ae835341706ed5d8 Author: Xin Liu <[email protected]> Date: Wed Jun 17 03:28:39 2026 +0000 i386: Fix some c86-4g-m7 reservations Fix several existing c86-4g-m7 scheduling reservation issues. The fixes correct decode unit selection, branch and call execution units, missing store resources for store or load/store forms, and several FPU pipeline resource descriptions. They also rename a few reservations so the template names better match the instructions they cover, and simplify duplicate memory attribute checks. gcc/ChangeLog: * config/i386/c86-4g-m7.md (c86_4g_m7_imov_xchg): Adjust reservation units. (c86_4g_m7_imov_xchg_load): Ditto. (c86_4g_m7_call): Ditto. (c86_4g_m7_branch): Ditto. (c86_4g_m7_branch_load): Ditto. (c86_4g_m7_fp_spc_direct): Add missing store unit. (c86_4g_m7_sse_pinsr_reg): Adjust reservation units. (c86_4g_m7_avx512_insertx_ymm): Ditto. (c86_4g_m7_avx512_insertx_ymem): Ditto. (c86_4g_m7_avx512_insertx_zxmm): Ditto. (c86_4g_m7_avx512_insertx_zxmem): Ditto. (c86_4g_m7_avx512_abs_load): Add missing store unit. (c86_4g_m7_avx_sign): Use combined FPU reservation. (c86_4g_m7_avx_sign_load): Ditto. (c86_4g_m7_avx_aes): Ditto. (c86_4g_m7_avx_aes_load): Ditto. (c86_4g_m7_extr_load): Rename to ... (c86_4g_m7_extr_store): ... this and restrict to store memory. (c86_4g_m7_avx_imul): Use combined FPU reservation. (c86_4g_m7_avx_imul_mem): Ditto. (c86_4g_m7_avx512_vpmovx_y_load): Add missing store unit. (c86_4g_m7_avx_vpmovx_xx_load): Ditto. (c86_4g_m7_avx512_sseadd_maxmin_xy): Rename to ... (c86_4g_m7_avx512_sseadd_maxmin): ... this and simplify memory attribute check. (c86_4g_m7_avx512_sseadd_maxmin_xy_load): Rename to ... (c86_4g_m7_avx512_sseadd_maxmin_load): ... this and simplify memory attribute check. (c86_4g_m7_avx512_sseadd_xy): Rename to ... (c86_4g_m7_avx512_sseadd): ... this. (c86_4g_m7_avx512_sseadd_xy_load): Rename to ... (c86_4g_m7_avx512_sseadd_load): ... this. (c86_4g_m7_sse_sseiadd_sadbw): Use combined FPU reservation. (c86_4g_m7_sse_sseiadd_sadbw_mem): Ditto. (c86_4g_m7_avx512_ssecmp_vp_z): Adjust reservation units. (c86_4g_m7_avx512_ssecmp_vp_z_load): Ditto. (c86_4g_m7_avx512_ssecmp_test_load): Ditto. (c86_4g_m7_avx512_mskmov_k_m): Adjust latency. Signed-off-by: Xin Liu <[email protected]> (cherry picked from commit 2f56b97c0333ba362a3d55ce117bea2d941e4342) Diff: --- gcc/config/i386/c86-4g-m7.md | 70 +++++++++++++++++++++----------------------- 1 file changed, 34 insertions(+), 36 deletions(-) diff --git a/gcc/config/i386/c86-4g-m7.md b/gcc/config/i386/c86-4g-m7.md index 96bd322a2883..19a8b356fa1b 100644 --- a/gcc/config/i386/c86-4g-m7.md +++ b/gcc/config/i386/c86-4g-m7.md @@ -117,14 +117,14 @@ (and (eq_attr "type" "imov") (and (eq_attr "c86_decode" "vector") (eq_attr "memory" "none")))) - "c86-4g-m7-direct") + "c86-4g-m7-vector") (define_insn_reservation "c86_4g_m7_imov_xchg_load" 5 (and (eq_attr "cpu" "c86_4g_m7") (and (eq_attr "type" "imov") (and (eq_attr "c86_decode" "vector") (eq_attr "memory" "!none")))) - "c86-4g-m7-direct,c86-4g-m7-load") + "c86-4g-m7-vector,c86-4g-m7-load") (define_insn_reservation "c86_4g_m7_imovx_cwde" 2 (and (eq_attr "cpu" "c86_4g_m7") @@ -322,20 +322,20 @@ (define_insn_reservation "c86_4g_m7_call" 1 (and (eq_attr "cpu" "c86_4g_m7") (eq_attr "type" "call,callv")) - "c86-4g-m7-double,c86-4g-m7-ieu0|c86-4g-m7-bru0,c86-4g-m7-store") + "c86-4g-m7-double,c86-4g-m7-store,c86-4g-m7-bru0") ;; IBR (define_insn_reservation "c86_4g_m7_branch" 1 (and (eq_attr "cpu" "c86_4g_m7") (and (eq_attr "type" "ibr") (eq_attr "memory" "none"))) - "c86-4g-m7-direct,c86-4g-m7-ieu0|c86-4g-m7-bru0") + "c86-4g-m7-direct,c86-4g-m7-bru0") (define_insn_reservation "c86_4g_m7_branch_load" 5 (and (eq_attr "cpu" "c86_4g_m7") (and (eq_attr "type" "ibr") (eq_attr "memory" "load"))) - "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-ieu0|c86-4g-m7-bru0") + "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-bru0") ;; LEA (define_insn_reservation "c86_4g_m7_lea" 1 @@ -451,7 +451,7 @@ (and (eq_attr "c86_decode" "direct") (and (eq_attr "c86_attr" "other") (eq_attr "memory" "store"))))) - "c86-4g-m7-direct,c86-4g-m7-fpu3") + "c86-4g-m7-direct,c86-4g-m7-store,c86-4g-m7-fpu3") (define_insn_reservation "c86_4g_m7_fp_spc" 6 (and (eq_attr "cpu" "c86_4g_m7") @@ -632,7 +632,7 @@ (and (eq_attr "c86_attr" "insr") (and (eq_attr "prefix" "orig") (eq_attr "memory" "none"))))) - "c86-4g-m7-double,c86-4g-m7-ieu2,c86-4g-m7-fpu") + "c86-4g-m7-direct,c86-4g-m7-fpu") (define_insn_reservation "c86_4g_m7_sse_pinsr_reg_load" 3 (and (eq_attr "cpu" "c86_4g_m7") @@ -755,7 +755,7 @@ (and (eq_attr "mode" "V8SF,V4DF,OI") (and (eq_attr "prefix" "evex") (eq_attr "memory" "none")))))) - "c86-4g-m7-direct,c86-4g-m7-fpu_0_2x2,c86-4g-m7-fpu_0_2x2") + "c86-4g-m7-direct,c86-4g-m7-fpu_0_2,c86-4g-m7-fpu_0_2") (define_insn_reservation "c86_4g_m7_avx512_insertx_ymem" 10 (and (eq_attr "cpu" "c86_4g_m7") @@ -764,7 +764,7 @@ (and (eq_attr "mode" "V8SF,V4DF,OI") (and (eq_attr "prefix" "evex") (eq_attr "memory" "load,both")))))) - "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_2x2,c86-4g-m7-fpu_0_2x2") + "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-store,c86-4g-m7-fpu_0_2,c86-4g-m7-fpu_0_2") (define_insn_reservation "c86_4g_m7_avx512_insertx_zxmm" 5 (and (eq_attr "cpu" "c86_4g_m7") @@ -773,7 +773,7 @@ (and (eq_attr "mode" "V16SF,V8DF,XI") (and (match_test "GET_MODE_SIZE (GET_MODE (operands[2]))==16") (match_operand 2 "register_operand")))))) - "c86-4g-m7-double,c86-4g-m7-fpu_0_2x4,c86-4g-m7-fpu_0_2x4") + "c86-4g-m7-double,c86-4g-m7-fpu_0_2x2,c86-4g-m7-fpu_0_2x2") (define_insn_reservation "c86_4g_m7_avx512_insertx_zxmem" 12 (and (eq_attr "cpu" "c86_4g_m7") @@ -782,7 +782,7 @@ (and (eq_attr "mode" "V16SF,V8DF,XI") (and (match_test "GET_MODE_SIZE (GET_MODE (operands[2]))==16") (match_operand 2 "memory_operand")))))) - "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-fpu_0_2x4,c86-4g-m7-fpu_0_2x4") + "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-fpu_0_2x2,c86-4g-m7-fpu_0_2x2") (define_insn_reservation "c86_4g_m7_avx512_insertx_zymm" 1 (and (eq_attr "cpu" "c86_4g_m7") @@ -945,7 +945,7 @@ (and (eq_attr "c86_attr" "abs") (and (eq_attr "prefix" "evex") (eq_attr "memory" "load,both"))))) - "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu") + "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-store,c86-4g-m7-fpu") ;; SIGN (define_insn_reservation "c86_4g_m7_avx_sign" 1 @@ -953,14 +953,14 @@ (and (eq_attr "type" "sselog1") (and (eq_attr "c86_attr" "sign") (eq_attr "memory" "none")))) - "c86-4g-m7-direct,c86-4g-m7-fpu0|c86-4g-m7-fpu3") + "c86-4g-m7-direct,c86-4g-m7-fpu_0_3") (define_insn_reservation "c86_4g_m7_avx_sign_load" 8 (and (eq_attr "cpu" "c86_4g_m7") (and (eq_attr "type" "sselog1") (and (eq_attr "c86_attr" "sign") (eq_attr "memory" "!none")))) - "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu0|c86-4g-m7-fpu3") + "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_3") ;; BLEND/ABS/AES (define_insn_reservation "c86_4g_m7_avx_blend" 1 @@ -1001,7 +1001,7 @@ (and (eq_attr "c86_attr" "aes") (and (eq_attr "prefix" "!evex") (eq_attr "memory" "none"))))) - "c86-4g-m7-direct,c86-4g-m7-fpu0|c86-4g-m7-fpu1") + "c86-4g-m7-direct,c86-4g-m7-fpu_0_1") (define_insn_reservation "c86_4g_m7_avx_aes_load" 10 (and (eq_attr "cpu" "c86_4g_m7") @@ -1009,7 +1009,7 @@ (and (eq_attr "c86_attr" "aes") (and (eq_attr "prefix" "!evex") (eq_attr "memory" "load"))))) - "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu0|c86-4g-m7-fpu1") + "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_1") ;; EXTR (define_insn_reservation "c86_4g_m7_extr" 5 @@ -1019,11 +1019,11 @@ (eq_attr "memory" "none")))) "c86-4g-m7-double,c86-4g-m7-fpu1,c86-4g-m7-fpu_0_1") -(define_insn_reservation "c86_4g_m7_extr_load" 12 +(define_insn_reservation "c86_4g_m7_extr_store" 12 (and (eq_attr "cpu" "c86_4g_m7") (and (eq_attr "type" "sselog1,sselog,mmxcvt") (and (eq_attr "c86_attr" "extr") - (eq_attr "memory" "!none")))) + (eq_attr "memory" "store")))) "c86-4g-m7-double,c86-4g-m7-store,c86-4g-m7-fpu1,c86-4g-m7-fpu_0_1") ;; SSECOMI @@ -1075,14 +1075,14 @@ (and (eq_attr "type" "sseimul") (and (eq_attr "prefix" "!evex") (eq_attr "memory" "none")))) - "c86-4g-m7-direct,c86-4g-m7-fpu0|c86-4g-m7-fpu3") + "c86-4g-m7-direct,c86-4g-m7-fpu_0_3") (define_insn_reservation "c86_4g_m7_avx_imul_mem" 10 (and (eq_attr "cpu" "c86_4g_m7") (and (eq_attr "type" "sseimul") (and (eq_attr "prefix" "!evex") (eq_attr "memory" "load")))) - "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu0|c86-4g-m7-fpu3") + "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_3") ;; SSEMOV (define_insn_reservation "c86_4g_m7_avx512_mov_vmov" 1 @@ -1122,7 +1122,7 @@ (and (eq_attr "prefix" "evex") (and (eq_attr "mode" "OI,V8SF,V4DF") (eq_attr "memory" "load,both")))))) - "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_2x2") + "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-store,c86-4g-m7-fpu_0_2x2") (define_insn_reservation "c86_4g_m7_avx512_vpmovx_z" 5 (and (eq_attr "cpu" "c86_4g_m7") @@ -1172,7 +1172,7 @@ (and (eq_attr "c86_attr" "vpmovx") (and (eq_attr "prefix" "!evex") (eq_attr "memory" "load,both"))))) - "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu1|c86-4g-m7-fpu2") + "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-store,c86-4g-m7-fpu1|c86-4g-m7-fpu2") ;; EXPAND (define_insn_reservation "c86_4g_m7_avx512_expand" 3 @@ -1301,22 +1301,20 @@ ;; SSEADD -(define_insn_reservation "c86_4g_m7_avx512_sseadd_maxmin_xy" 1 +(define_insn_reservation "c86_4g_m7_avx512_sseadd_maxmin" 1 (and (eq_attr "cpu" "c86_4g_m7") (and (eq_attr "type" "sseadd,sse") (and (eq_attr "c86_attr" "maxmin") (and (eq_attr "prefix" "evex") - (and (eq_attr "memory" "none") - (eq_attr "memory" "none")))))) + (eq_attr "memory" "none"))))) "c86-4g-m7-direct,c86-4g-m7-fpu_0_2") -(define_insn_reservation "c86_4g_m7_avx512_sseadd_maxmin_xy_load" 8 +(define_insn_reservation "c86_4g_m7_avx512_sseadd_maxmin_load" 8 (and (eq_attr "cpu" "c86_4g_m7") (and (eq_attr "type" "sseadd,sse") (and (eq_attr "c86_attr" "maxmin") (and (eq_attr "prefix" "evex") - (ior (eq_attr "memory" "load") - (eq_attr "memory" "load")))))) + (eq_attr "memory" "load"))))) "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_2") (define_insn_reservation "c86_4g_m7_avx_sseadd_maxmin" 1 @@ -1352,14 +1350,14 @@ "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu2|c86-4g-m7-fpu3") ;; SUB/ADD -(define_insn_reservation "c86_4g_m7_avx512_sseadd_xy" 3 +(define_insn_reservation "c86_4g_m7_avx512_sseadd" 3 (and (eq_attr "cpu" "c86_4g_m7") (and (eq_attr "type" "sseadd") (and (eq_attr "c86_attr" "other") (eq_attr "memory" "none")))) "c86-4g-m7-direct,c86-4g-m7-fpu_1_3") -(define_insn_reservation "c86_4g_m7_avx512_sseadd_xy_load" 10 +(define_insn_reservation "c86_4g_m7_avx512_sseadd_load" 10 (and (eq_attr "cpu" "c86_4g_m7") (and (eq_attr "type" "sseadd") (and (eq_attr "c86_attr" "other") @@ -1424,7 +1422,7 @@ (and (eq_attr "c86_attr" "sadbw") (and (eq_attr "prefix" "orig") (eq_attr "memory" "none"))))) - "c86-4g-m7-direct,c86-4g-m7-fpu0|c86-4g-m7-fpu3") + "c86-4g-m7-direct,c86-4g-m7-fpu_0_3") (define_insn_reservation "c86_4g_m7_sse_sseiadd_sadbw_mem" 10 (and (eq_attr "cpu" "c86_4g_m7") @@ -1432,7 +1430,7 @@ (and (eq_attr "c86_attr" "sadbw") (and (eq_attr "prefix" "orig") (eq_attr "memory" "load"))))) - "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu0|c86-4g-m7-fpu3") + "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_3") (define_insn_reservation "c86_4g_m7_sse_sseiadd_madd" 3 (and (eq_attr "cpu" "c86_4g_m7") @@ -1611,7 +1609,7 @@ (and (eq_attr "mode" "XI") (and (eq_attr "c86_attr" "other,ptest") (eq_attr "memory" "none")))))) - "c86-4g-m7-double,c86-4g-m7-fpu,c86-4g-m7-fpu_1_3") + "c86-4g-m7-vector,c86-4g-m7-fpu,c86-4g-m7-fpu_1_3") (define_insn_reservation "c86_4g_m7_avx512_ssecmp_vp_z_load" 12 (and (eq_attr "cpu" "c86_4g_m7") @@ -1620,7 +1618,7 @@ (and (eq_attr "mode" "XI") (and (eq_attr "c86_attr" "other,ptest") (eq_attr "memory" "load")))))) - "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-fpu,c86-4g-m7-fpu_1_3x2") + "c86-4g-m7-vector,c86-4g-m7-load,c86-4g-m7-fpu,c86-4g-m7-fpu_1_3x2") (define_insn_reservation "c86_4g_m7_avx_ssecmp_vp" 1 (and (eq_attr "cpu" "c86_4g_m7") @@ -1651,7 +1649,7 @@ (and (eq_attr "mode" "TI,OI") (and (eq_attr "c86_attr" "ptest") (eq_attr "memory" "load"))))) - "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-fpu1,c86-4g-m7-fpu_1_3") + "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-fpu,c86-4g-m7-fpu_1_3") ;; SSECVT (define_insn_reservation "c86_4g_m7_avx512_ssecvt_xy" 4 @@ -2055,7 +2053,7 @@ (match_operand 1 "register_operand" "r")))) "c86-4g-m7-double,c86-4g-m7-fpu1,c86-4g-m7-fpu_1_3") -(define_insn_reservation "c86_4g_m7_avx512_mskmov_k_m" 8 +(define_insn_reservation "c86_4g_m7_avx512_mskmov_k_m" 9 (and (eq_attr "cpu" "c86_4g_m7") (and (eq_attr "type" "mskmov") (and (match_operand 0 "register_operand" "k")
