https://gcc.gnu.org/g:7af6db6d7b5903c118f9cc57ff2496128c78f518
commit r17-2293-g7af6db6d7b5903c118f9cc57ff2496128c78f518 Author: Pan Li <[email protected]> Date: Wed Jul 8 13:56:19 2026 +0800 RISC-V: Add test cases for vsext.vf4 reg overlap Add test cases for vsext.vf4 register group overlap, please note it is not overlap as much as possible. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i16-m1.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i16-m2.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i16-mf2.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i16-mf4.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i8-m1.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i8-m2.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i8-mf2.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i8-mf4.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i8-mf8.c: New test. Signed-off-by: Pan Li <[email protected]> Diff: --- .../rvv/autovec/group_overlap/vsext_vf4-i16-m1.c | 17 ++++++++++++++++ .../rvv/autovec/group_overlap/vsext_vf4-i16-m2.c | 17 ++++++++++++++++ .../rvv/autovec/group_overlap/vsext_vf4-i16-mf2.c | 23 ++++++++++++++++++++++ .../rvv/autovec/group_overlap/vsext_vf4-i16-mf4.c | 23 ++++++++++++++++++++++ .../rvv/autovec/group_overlap/vsext_vf4-i8-m1.c | 17 ++++++++++++++++ .../rvv/autovec/group_overlap/vsext_vf4-i8-m2.c | 17 ++++++++++++++++ .../rvv/autovec/group_overlap/vsext_vf4-i8-mf2.c | 23 ++++++++++++++++++++++ .../rvv/autovec/group_overlap/vsext_vf4-i8-mf4.c | 23 ++++++++++++++++++++++ .../rvv/autovec/group_overlap/vsext_vf4-i8-mf8.c | 23 ++++++++++++++++++++++ 9 files changed, 183 insertions(+) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i16-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i16-m1.c new file mode 100644 index 000000000000..e28ff65154fa --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i16-m1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e16m1, + vint16m1_t, + vint64m4_t, + __riscv_vle16_v_i16m1, + __riscv_vsext_vf4_i64m4, + __riscv_vse64_v_i64m4, + vsext_vf, + LOOP_UNARY_BODY_X8) + +/* { dg-final { scan-assembler-times {vsext\.vf4\s+v0,v3([^0-9]|$)} 1 } } */ +/* { dg-final { scan-assembler-times {vsext\.vf4\s+v4,v7} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i16-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i16-m2.c new file mode 100644 index 000000000000..4a9b6520ef72 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i16-m2.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e16m2, + vint16m2_t, + vint64m8_t, + __riscv_vle16_v_i16m2, + __riscv_vsext_vf4_i64m8, + __riscv_vse64_v_i64m8, + vsext_vf, + LOOP_UNARY_BODY_X4) + +/* { dg-final { scan-assembler-times {vsext\.vf4\s+v0,v6} 1 } } */ +/* { dg-final { scan-assembler-times {vsext\.vf4\s+v8,v14} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i16-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i16-mf2.c new file mode 100644 index 000000000000..0264d7a0853d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i16-mf2.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e16m1, + vint16mf2_t, + vint64m2_t, + __riscv_vle16_v_i16mf2, + __riscv_vsext_vf4_i64m2, + __riscv_vse64_v_i64m2, + vsext_vf, + LOOP_UNARY_BODY_X16) + +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v0,v3([^0-9]|$)} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v4,v7} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v8,v11} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v12,v15} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v16,v19} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v20,v23} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v24,v27} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v28,v31} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i16-mf4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i16-mf4.c new file mode 100644 index 000000000000..6c7b46d0c338 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i16-mf4.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e16m1, + vint16mf4_t, + vint64m1_t, + __riscv_vle16_v_i16mf4, + __riscv_vsext_vf4_i64m1, + __riscv_vse64_v_i64m1, + vsext_vf, + LOOP_UNARY_BODY_X16) + +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v0,v3([^0-9]|$)} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v4,v7} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v8,v11} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v12,v15} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v16,v19} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v20,v23} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v24,v27} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v28,v31} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i8-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i8-m1.c new file mode 100644 index 000000000000..b7aac36cde1c --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i8-m1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e8m1, + vint8m1_t, + vint32m4_t, + __riscv_vle8_v_i8m1, + __riscv_vsext_vf4_i32m4, + __riscv_vse32_v_i32m4, + vsext_vf, + LOOP_UNARY_BODY_X8) + +/* { dg-final { scan-assembler-times {vsext\.vf4\s+v0,v3([^0-9]|$)} 1 } } */ +/* { dg-final { scan-assembler-times {vsext\.vf4\s+v4,v7} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i8-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i8-m2.c new file mode 100644 index 000000000000..c90130d274c3 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i8-m2.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e8m2, + vint8m2_t, + vint32m8_t, + __riscv_vle8_v_i8m2, + __riscv_vsext_vf4_i32m8, + __riscv_vse32_v_i32m8, + vsext_vf, + LOOP_UNARY_BODY_X4) + +/* { dg-final { scan-assembler-times {vsext\.vf4\s+v0,v6} 1 } } */ +/* { dg-final { scan-assembler-times {vsext\.vf4\s+v8,v14} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i8-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i8-mf2.c new file mode 100644 index 000000000000..e8268f5f02a4 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i8-mf2.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e8m1, + vint8mf2_t, + vint32m2_t, + __riscv_vle8_v_i8mf2, + __riscv_vsext_vf4_i32m2, + __riscv_vse32_v_i32m2, + vsext_vf, + LOOP_UNARY_BODY_X16) + +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v0,v3([^0-9]|$)} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v4,v7} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v8,v11} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v12,v15} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v16,v19} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v20,v23} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v24,v27} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v28,v31} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i8-mf4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i8-mf4.c new file mode 100644 index 000000000000..60f16139b0ae --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i8-mf4.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e8m1, + vint8mf4_t, + vint32m1_t, + __riscv_vle8_v_i8mf4, + __riscv_vsext_vf4_i32m1, + __riscv_vse32_v_i32m1, + vsext_vf, + LOOP_UNARY_BODY_X16) + +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v0,v3([^0-9]|$)} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v4,v7} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v8,v11} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v12,v15} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v16,v19} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v20,v23} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v24,v27} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v28,v31} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i8-mf8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i8-mf8.c new file mode 100644 index 000000000000..0f758f8deede --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf4-i8-mf8.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e8m1, + vint8mf8_t, + vint32mf2_t, + __riscv_vle8_v_i8mf8, + __riscv_vsext_vf4_i32mf2, + __riscv_vse32_v_i32mf2, + vsext_vf, + LOOP_UNARY_BODY_X16) + +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v0,v3([^0-9]|$)} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v4,v7} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v8,v11} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v12,v15} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v16,v19} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v20,v23} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v24,v27} } } */ +/* { dg-final { scan-assembler-not {vsext\.vf4\s+v28,v31} } } */
