https://gcc.gnu.org/g:b20dc9dbc78c52cde85c20cdca0b04e1125a6643
commit r17-5722-gb20dc9dbc78c52cde85c20cdca0b04e1125a6643 Author: Pan Li <[email protected]> Date: Wed Oct 28 10:38:39 2026 +0800 RISC-V: Disable RVV register overlap for vwmacc[u].vv [PR target/128162] Revert the register overlap of the widening multiply-add insn vwmacc[u].vv and the related test cases. The insn reads the vd as the accumulator with EEW = 2 * SEW, while the vs1 and vs2 are read with EEW = SEW. The section 5.2 of the vector spec reserves any encoding in which one vector register supplies source operands with two or more different EEWs. Thus, the vs1 and vs2 must not overlap the vd register group, even in the highest-numbered part. For example, below asm dump is reserved as the v3 is read with both the EEW = 32 and the EEW = 16. vwmacc.vv v2,v3,v4 # LMUL = 1, SEW = 16 This reverts commit(s): 2be327c50de RISC-V: Allow RVV register overlap for vwmacc[u].vv 55afdf36b7a RISC-V: Add test cases for vwmacc.vv reg overlap 4f75092d25c RISC-V: Add test cases for vwmaccu.vv reg overlap c5d147d7370 RISC-V: Add more test cases for vwmacc[u].vv PR target/128162 gcc/ChangeLog: * config/riscv/vector.md: Revert Wvr constraint to the early clobber vr. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-m1.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-m2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-m4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-mf2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-mf4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i32-m1.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i32-m2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i32-m4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i32-mf2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-m1.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-m2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-m4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-mf2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-mf4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-mf8.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-m1.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-m2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-m4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-mf2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-mf4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u32-m1.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u32-m2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u32-m4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u32-mf2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-m1.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-m2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-m4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-mf2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-mf4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-mf8.c: Removed. * gcc.target/riscv/rvv/base/pr112431-49.c: Removed. * gcc.target/riscv/rvv/base/pr112431-50.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h: Remove test helper macros. Signed-off-by: Pan Li <[email protected]> Diff: --- gcc/config/riscv/vector.md | 18 +- .../rvv/autovec/group_overlap/group_overlap.h | 230 --------------------- .../rvv/autovec/group_overlap/vwmacc_vv-i16-m1.c | 57 ----- .../rvv/autovec/group_overlap/vwmacc_vv-i16-m2.c | 49 ----- .../rvv/autovec/group_overlap/vwmacc_vv-i16-m4.c | 45 ---- .../rvv/autovec/group_overlap/vwmacc_vv-i16-mf2.c | 21 -- .../rvv/autovec/group_overlap/vwmacc_vv-i16-mf4.c | 21 -- .../rvv/autovec/group_overlap/vwmacc_vv-i32-m1.c | 57 ----- .../rvv/autovec/group_overlap/vwmacc_vv-i32-m2.c | 49 ----- .../rvv/autovec/group_overlap/vwmacc_vv-i32-m4.c | 45 ---- .../rvv/autovec/group_overlap/vwmacc_vv-i32-mf2.c | 21 -- .../rvv/autovec/group_overlap/vwmacc_vv-i8-m1.c | 57 ----- .../rvv/autovec/group_overlap/vwmacc_vv-i8-m2.c | 49 ----- .../rvv/autovec/group_overlap/vwmacc_vv-i8-m4.c | 45 ---- .../rvv/autovec/group_overlap/vwmacc_vv-i8-mf2.c | 21 -- .../rvv/autovec/group_overlap/vwmacc_vv-i8-mf4.c | 21 -- .../rvv/autovec/group_overlap/vwmacc_vv-i8-mf8.c | 21 -- .../rvv/autovec/group_overlap/vwmaccu_vv-u16-m1.c | 57 ----- .../rvv/autovec/group_overlap/vwmaccu_vv-u16-m2.c | 49 ----- .../rvv/autovec/group_overlap/vwmaccu_vv-u16-m4.c | 45 ---- .../rvv/autovec/group_overlap/vwmaccu_vv-u16-mf2.c | 21 -- .../rvv/autovec/group_overlap/vwmaccu_vv-u16-mf4.c | 21 -- .../rvv/autovec/group_overlap/vwmaccu_vv-u32-m1.c | 57 ----- .../rvv/autovec/group_overlap/vwmaccu_vv-u32-m2.c | 49 ----- .../rvv/autovec/group_overlap/vwmaccu_vv-u32-m4.c | 45 ---- .../rvv/autovec/group_overlap/vwmaccu_vv-u32-mf2.c | 21 -- .../rvv/autovec/group_overlap/vwmaccu_vv-u8-m1.c | 57 ----- .../rvv/autovec/group_overlap/vwmaccu_vv-u8-m2.c | 49 ----- .../rvv/autovec/group_overlap/vwmaccu_vv-u8-m4.c | 45 ---- .../rvv/autovec/group_overlap/vwmaccu_vv-u8-mf2.c | 21 -- .../rvv/autovec/group_overlap/vwmaccu_vv-u8-mf4.c | 21 -- .../rvv/autovec/group_overlap/vwmaccu_vv-u8-mf8.c | 21 -- .../gcc.target/riscv/rvv/base/pr112431-49.c | 59 ------ .../gcc.target/riscv/rvv/base/pr112431-50.c | 59 ------ 34 files changed, 9 insertions(+), 1515 deletions(-) diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md index f8854dc50ea2..6c7c944ee5b9 100644 --- a/gcc/config/riscv/vector.md +++ b/gcc/config/riscv/vector.md @@ -6079,23 +6079,23 @@ ;; ------------------------------------------------------------------------------- (define_insn "@pred_widen_mul_plus<su><mode>" - [(set (match_operand:VWEXTI 0 "register_operand" "=vr, vd") + [(set (match_operand:VWEXTI 0 "register_operand" "=&vr") (if_then_else:VWEXTI (unspec:<VM> - [(match_operand:<VM> 1 "vector_mask_operand" "Wc1, vm") - (match_operand 5 "vector_length_operand" "rvl,rvl") - (match_operand 6 "const_int_operand" " i, i") - (match_operand 7 "const_int_operand" " i, i") - (match_operand 8 "const_int_operand" " i, i") + [(match_operand:<VM> 1 "vector_mask_operand" "vmWc1") + (match_operand 5 "vector_length_operand" " rvl") + (match_operand 6 "const_int_operand" " i") + (match_operand 7 "const_int_operand" " i") + (match_operand 8 "const_int_operand" " i") (reg:SI VL_REGNUM) (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE) (plus:VWEXTI (mult:VWEXTI (any_extend:VWEXTI - (match_operand:<V_DOUBLE_TRUNC> 3 "register_operand" "Wvr,Wvr")) + (match_operand:<V_DOUBLE_TRUNC> 3 "register_operand" " vr")) (any_extend:VWEXTI - (match_operand:<V_DOUBLE_TRUNC> 4 "register_operand" "Wvr,Wvr"))) - (match_operand:VWEXTI 2 "register_operand" " 0, 0")) + (match_operand:<V_DOUBLE_TRUNC> 4 "register_operand" " vr"))) + (match_operand:VWEXTI 2 "register_operand" " 0")) (match_dup 2)))] "TARGET_VECTOR" "vwmacc<u>.vv\t%0,%3,%4%p1" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h index bbacdb2cee34..45f8f45e85b3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h @@ -644,205 +644,6 @@ ST_F ((void *)out, vd14, VL); OUT += VL; \ ST_F ((void *)out, vd15, VL); OUT += VL; \ -#define LOOP_DUAL_WIDEN_TERNARY_BODY_X4(NT, WT, LD_NF, LD_WF, OUT_F, ST_F, \ - OUT, START, VL) \ - NT vs0 = LD_NF ((void *)START, VL); START += VL; \ - NT vs1 = LD_NF ((void *)START, VL); START += VL; \ - NT vs2 = LD_NF ((void *)START, VL); START += VL; \ - NT vs3 = LD_NF ((void *)START, VL); START += VL; \ - NT vt0 = LD_NF ((void *)START, VL); START += VL; \ - NT vt1 = LD_NF ((void *)START, VL); START += VL; \ - NT vt2 = LD_NF ((void *)START, VL); START += VL; \ - NT vt3 = LD_NF ((void *)START, VL); START += VL; \ - WT vw0 = LD_WF ((void *)START, VL); START += VL; \ - WT vw1 = LD_WF ((void *)START, VL); START += VL; \ - WT vw2 = LD_WF ((void *)START, VL); START += VL; \ - WT vw3 = LD_WF ((void *)START, VL); START += VL; \ - \ - asm volatile("nop" ::: "memory"); \ - \ - WT vd0 = OUT_F (vw0, vs0, vt0, VL); \ - WT vd1 = OUT_F (vw1, vs1, vt1, VL); \ - WT vd2 = OUT_F (vw2, vs2, vt2, VL); \ - WT vd3 = OUT_F (vw3, vs3, vt3, VL); \ - \ - asm volatile("nop" ::: "memory"); \ - \ - ST_F ((void *)out, vd0, VL); OUT += VL; \ - ST_F ((void *)out, vd1, VL); OUT += VL; \ - ST_F ((void *)out, vd2, VL); OUT += VL; \ - ST_F ((void *)out, vd3, VL); OUT += VL; \ - -#define LOOP_DUAL_WIDEN_TERNARY_BODY_X8(NT, WT, LD_NF, LD_WF, OUT_F, ST_F, \ - OUT, START, VL) \ - NT vs0 = LD_NF ((void *)START, VL); START += VL; \ - NT vs1 = LD_NF ((void *)START, VL); START += VL; \ - NT vs2 = LD_NF ((void *)START, VL); START += VL; \ - NT vs3 = LD_NF ((void *)START, VL); START += VL; \ - NT vs4 = LD_NF ((void *)START, VL); START += VL; \ - NT vs5 = LD_NF ((void *)START, VL); START += VL; \ - NT vs6 = LD_NF ((void *)START, VL); START += VL; \ - NT vs7 = LD_NF ((void *)START, VL); START += VL; \ - NT vt0 = LD_NF ((void *)START, VL); START += VL; \ - NT vt1 = LD_NF ((void *)START, VL); START += VL; \ - NT vt2 = LD_NF ((void *)START, VL); START += VL; \ - NT vt3 = LD_NF ((void *)START, VL); START += VL; \ - NT vt4 = LD_NF ((void *)START, VL); START += VL; \ - NT vt5 = LD_NF ((void *)START, VL); START += VL; \ - NT vt6 = LD_NF ((void *)START, VL); START += VL; \ - NT vt7 = LD_NF ((void *)START, VL); START += VL; \ - WT vw0 = LD_WF ((void *)START, VL); START += VL; \ - WT vw1 = LD_WF ((void *)START, VL); START += VL; \ - WT vw2 = LD_WF ((void *)START, VL); START += VL; \ - WT vw3 = LD_WF ((void *)START, VL); START += VL; \ - WT vw4 = LD_WF ((void *)START, VL); START += VL; \ - WT vw5 = LD_WF ((void *)START, VL); START += VL; \ - WT vw6 = LD_WF ((void *)START, VL); START += VL; \ - WT vw7 = LD_WF ((void *)START, VL); START += VL; \ - \ - asm volatile("nop" ::: "memory"); \ - \ - WT vd0 = OUT_F (vw0, vs0, vt0, VL); \ - WT vd1 = OUT_F (vw1, vs1, vt1, VL); \ - WT vd2 = OUT_F (vw2, vs2, vt2, VL); \ - WT vd3 = OUT_F (vw3, vs3, vt3, VL); \ - WT vd4 = OUT_F (vw4, vs4, vt4, VL); \ - WT vd5 = OUT_F (vw5, vs5, vt5, VL); \ - WT vd6 = OUT_F (vw6, vs6, vt6, VL); \ - WT vd7 = OUT_F (vw7, vs7, vt7, VL); \ - \ - asm volatile("nop" ::: "memory"); \ - \ - ST_F ((void *)out, vd0, VL); OUT += VL; \ - ST_F ((void *)out, vd1, VL); OUT += VL; \ - ST_F ((void *)out, vd2, VL); OUT += VL; \ - ST_F ((void *)out, vd3, VL); OUT += VL; \ - ST_F ((void *)out, vd4, VL); OUT += VL; \ - ST_F ((void *)out, vd5, VL); OUT += VL; \ - ST_F ((void *)out, vd6, VL); OUT += VL; \ - ST_F ((void *)out, vd7, VL); OUT += VL; \ - -#define LOOP_DUAL_WIDEN_TERNARY_BODY_X16(NT, WT, LD_NF, LD_WF, OUT_F, ST_F, \ - OUT, START, VL) \ - NT vs0 = LD_NF ((void *)START, VL); START += VL; \ - NT vs1 = LD_NF ((void *)START, VL); START += VL; \ - NT vs2 = LD_NF ((void *)START, VL); START += VL; \ - NT vs3 = LD_NF ((void *)START, VL); START += VL; \ - NT vs4 = LD_NF ((void *)START, VL); START += VL; \ - NT vs5 = LD_NF ((void *)START, VL); START += VL; \ - NT vs6 = LD_NF ((void *)START, VL); START += VL; \ - NT vs7 = LD_NF ((void *)START, VL); START += VL; \ - NT vs8 = LD_NF ((void *)START, VL); START += VL; \ - NT vs9 = LD_NF ((void *)START, VL); START += VL; \ - NT vs10 = LD_NF ((void *)START, VL); START += VL; \ - NT vs11 = LD_NF ((void *)START, VL); START += VL; \ - NT vs12 = LD_NF ((void *)START, VL); START += VL; \ - NT vs13 = LD_NF ((void *)START, VL); START += VL; \ - NT vs14 = LD_NF ((void *)START, VL); START += VL; \ - NT vs15 = LD_NF ((void *)START, VL); START += VL; \ - NT vt0 = LD_NF ((void *)START, VL); START += VL; \ - NT vt1 = LD_NF ((void *)START, VL); START += VL; \ - NT vt2 = LD_NF ((void *)START, VL); START += VL; \ - NT vt3 = LD_NF ((void *)START, VL); START += VL; \ - NT vt4 = LD_NF ((void *)START, VL); START += VL; \ - NT vt5 = LD_NF ((void *)START, VL); START += VL; \ - NT vt6 = LD_NF ((void *)START, VL); START += VL; \ - NT vt7 = LD_NF ((void *)START, VL); START += VL; \ - NT vt8 = LD_NF ((void *)START, VL); START += VL; \ - NT vt9 = LD_NF ((void *)START, VL); START += VL; \ - NT vt10 = LD_NF ((void *)START, VL); START += VL; \ - NT vt11 = LD_NF ((void *)START, VL); START += VL; \ - NT vt12 = LD_NF ((void *)START, VL); START += VL; \ - NT vt13 = LD_NF ((void *)START, VL); START += VL; \ - NT vt14 = LD_NF ((void *)START, VL); START += VL; \ - NT vt15 = LD_NF ((void *)START, VL); START += VL; \ - WT vw0 = LD_WF ((void *)START, VL); START += VL; \ - WT vw1 = LD_WF ((void *)START, VL); START += VL; \ - WT vw2 = LD_WF ((void *)START, VL); START += VL; \ - WT vw3 = LD_WF ((void *)START, VL); START += VL; \ - WT vw4 = LD_WF ((void *)START, VL); START += VL; \ - WT vw5 = LD_WF ((void *)START, VL); START += VL; \ - WT vw6 = LD_WF ((void *)START, VL); START += VL; \ - WT vw7 = LD_WF ((void *)START, VL); START += VL; \ - WT vw8 = LD_WF ((void *)START, VL); START += VL; \ - WT vw9 = LD_WF ((void *)START, VL); START += VL; \ - WT vw10 = LD_WF ((void *)START, VL); START += VL; \ - WT vw11 = LD_WF ((void *)START, VL); START += VL; \ - WT vw12 = LD_WF ((void *)START, VL); START += VL; \ - WT vw13 = LD_WF ((void *)START, VL); START += VL; \ - WT vw14 = LD_WF ((void *)START, VL); START += VL; \ - WT vw15 = LD_WF ((void *)START, VL); START += VL; \ - \ - asm volatile("nop" ::: "memory"); \ - \ - WT vd0 = OUT_F (vw0, vs0, vt0, VL); \ - WT vd1 = OUT_F (vw1, vs1, vt1, VL); \ - WT vd2 = OUT_F (vw2, vs2, vt2, VL); \ - WT vd3 = OUT_F (vw3, vs3, vt3, VL); \ - WT vd4 = OUT_F (vw4, vs4, vt4, VL); \ - WT vd5 = OUT_F (vw5, vs5, vt5, VL); \ - WT vd6 = OUT_F (vw6, vs6, vt6, VL); \ - WT vd7 = OUT_F (vw7, vs7, vt7, VL); \ - WT vd8 = OUT_F (vw8, vs8, vt8, VL); \ - WT vd9 = OUT_F (vw9, vs9, vt9, VL); \ - WT vd10 = OUT_F (vw10, vs10, vt10, VL); \ - WT vd11 = OUT_F (vw11, vs11, vt11, VL); \ - WT vd12 = OUT_F (vw12, vs12, vt12, VL); \ - WT vd13 = OUT_F (vw13, vs13, vt13, VL); \ - WT vd14 = OUT_F (vw14, vs14, vt14, VL); \ - WT vd15 = OUT_F (vw15, vs15, vt15, VL); \ - \ - asm volatile("nop" ::: "memory"); \ - \ - ST_F ((void *)out, vd0, VL); OUT += VL; \ - ST_F ((void *)out, vd1, VL); OUT += VL; \ - ST_F ((void *)out, vd2, VL); OUT += VL; \ - ST_F ((void *)out, vd3, VL); OUT += VL; \ - ST_F ((void *)out, vd4, VL); OUT += VL; \ - ST_F ((void *)out, vd5, VL); OUT += VL; \ - ST_F ((void *)out, vd6, VL); OUT += VL; \ - ST_F ((void *)out, vd7, VL); OUT += VL; \ - ST_F ((void *)out, vd8, VL); OUT += VL; \ - ST_F ((void *)out, vd9, VL); OUT += VL; \ - ST_F ((void *)out, vd10, VL); OUT += VL; \ - ST_F ((void *)out, vd11, VL); OUT += VL; \ - ST_F ((void *)out, vd12, VL); OUT += VL; \ - ST_F ((void *)out, vd13, VL); OUT += VL; \ - ST_F ((void *)out, vd14, VL); OUT += VL; \ - ST_F ((void *)out, vd15, VL); OUT += VL; \ - -/* The widened destination register group of a dual widen ternary insn is tied - to the accumulator, which is still live when the narrowed sources are read. - Feeding one narrowed source from the highest-numbered half of the - accumulator's own register group is thus the only way the sources can - legally overlap the destination register group: the shared registers hold - one single value, seen as the accumulator's high part and as the narrowed - source at the same time. RI_F reinterprets the widened type as the - narrowed element type, GET_F extracts the highest-numbered half of it. */ -#define LOOP_DUAL_WIDEN_TERNARY_BODY_OVERLAP_X2(NT, WT, WNT, LD_NF, LD_WF, \ - RI_F, GET_F, OUT_F, ST_F, \ - OUT, START, VL) \ - NT vt0 = LD_NF ((void *)START, VL); START += VL; \ - NT vt1 = LD_NF ((void *)START, VL); START += VL; \ - WT vw0 = LD_WF ((void *)START, VL); START += VL; \ - WT vw1 = LD_WF ((void *)START, VL); START += VL; \ - \ - asm volatile("nop" ::: "memory"); \ - \ - WNT vr0 = RI_F (vw0); \ - WNT vr1 = RI_F (vw1); \ - \ - NT vs0 = GET_F (vr0, 1); \ - NT vs1 = GET_F (vr1, 1); \ - \ - WT vd0 = OUT_F (vw0, vs0, vt0, VL); \ - WT vd1 = OUT_F (vw1, vs1, vt1, VL); \ - \ - asm volatile("nop" ::: "memory"); \ - \ - ST_F ((void *)out, vd0, VL); OUT += VL; \ - ST_F ((void *)out, vd1, VL); OUT += VL; \ - /* A widening reduction reads vs1 with EEW = 2 * SEW while vs2 is read with EEW = SEW, thus vs1 must not fall inside the vs2 register group. Taking vs1 out of the vs2 register group itself is the only way the two can be asked to @@ -968,37 +769,6 @@ } \ } -#define DEF_GROUP_OVERLAP_TERNARY_0(VL_F, NT, WT, LD_NF, LD_WF, OUT_F, \ - ST_F, NAME, LOOP_BODY) \ - void test_group_overlap_##NAME##_##NT##_ternary_0(uint8_t *data, \ - uint8_t *out, \ - size_t limit) \ - { \ - uint8_t *start = data; \ - uint8_t *end = data + limit; \ - size_t vl = VL_F (); \ - \ - while (start < end) { \ - LOOP_BODY (NT, WT, LD_NF, LD_WF, OUT_F, ST_F, out, start, vl); \ - } \ - } - -#define DEF_GROUP_OVERLAP_TERNARY_1(VL_F, NT, WT, WNT, LD_NF, LD_WF, RI_F, \ - GET_F, OUT_F, ST_F, NAME, LOOP_BODY) \ - void test_group_overlap_##NAME##_##NT##_ternary_1(uint8_t *data, \ - uint8_t *out, \ - size_t limit) \ - { \ - uint8_t *start = data; \ - uint8_t *end = data + limit; \ - size_t vl = VL_F (); \ - \ - while (start < end) { \ - LOOP_BODY (NT, WT, WNT, LD_NF, LD_WF, RI_F, GET_F, OUT_F, ST_F, out, \ - start, vl); \ - } \ - } - #define DEF_GROUP_OVERLAP_REDUCE_0(VL_F, NT, WT, WNT, LD_NF, RI_F, GET_F, \ IDX, OUT_F, ST_F, NAME, LOOP_BODY) \ void test_group_overlap_##NAME##_##NT##_reduce_0(uint8_t *data, \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-m1.c deleted file mode 100644 index 79f34b2aa0bc..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-m1.c +++ /dev/null @@ -1,57 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e16m1, - vint16m1_t, - vint32m2_t, - __riscv_vle16_v_i16m1, - __riscv_vle32_v_i32m2, - __riscv_vwmacc_vv_i32m2, - __riscv_vse32_v_i32m2, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X16) - -DEF_GROUP_OVERLAP_TERNARY_1( - __riscv_vsetvlmax_e16m1, - vint16m1_t, - vint32m2_t, - vint16m2_t, - __riscv_vle16_v_i16m1, - __riscv_vle32_v_i32m2, - __riscv_vreinterpret_v_i32m2_i16m2, - __riscv_vget_v_i16m2_i16m1, - __riscv_vwmacc_vv_i32m2, - __riscv_vse32_v_i32m2, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_OVERLAP_X2) - -/* ternary_0: the accumulator occupies the whole destination register group and - is live when the narrowed sources are read, so no source can be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v12,v30,v29([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v4,v16,v15([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v2,v0,v31([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v8,v14,v1([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v30,v28,v27([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v28,v26,v25([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v6,v20,v19([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v26,v24,v23([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v2,v18,v17([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v10,v1,v15([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v24,v22,v21([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v14,v19,v17([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v16,v21,v23([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v18,v20,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v20,v0,v1([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v22,v0,v1([^0-9]|$)} 1 } } */ - -/* ternary_1: each narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the sources would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v4,v5,v8([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v2,v3,v1([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-m2.c deleted file mode 100644 index 0d6660b5cb6e..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-m2.c +++ /dev/null @@ -1,49 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e16m2, - vint16m2_t, - vint32m4_t, - __riscv_vle16_v_i16m2, - __riscv_vle32_v_i32m4, - __riscv_vwmacc_vv_i32m4, - __riscv_vse32_v_i32m4, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X8) - -DEF_GROUP_OVERLAP_TERNARY_1( - __riscv_vsetvlmax_e16m2, - vint16m2_t, - vint32m4_t, - vint16m4_t, - __riscv_vle16_v_i16m2, - __riscv_vle32_v_i32m4, - __riscv_vreinterpret_v_i32m4_i16m4, - __riscv_vget_v_i16m4_i16m2, - __riscv_vwmacc_vv_i32m4, - __riscv_vse32_v_i32m4, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_OVERLAP_X2) - -/* ternary_0: the accumulator occupies the whole destination register group and - is live when the narrowed sources are read, so no source can be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v8,v0,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v0,v28,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v28,v24,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v24,v20,v18([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v20,v16,v14([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v16,v12,v10([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v12,v8,v6([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v8,v4,v2([^0-9]|$)} 1 } } */ - -/* ternary_1: each narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the sources would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v8,v10,v16([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v4,v6,v2([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-m4.c deleted file mode 100644 index 7568c6a871ab..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-m4.c +++ /dev/null @@ -1,45 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e16m4, - vint16m4_t, - vint32m8_t, - __riscv_vle16_v_i16m4, - __riscv_vle32_v_i32m8, - __riscv_vwmacc_vv_i32m8, - __riscv_vse32_v_i32m8, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X4) - -DEF_GROUP_OVERLAP_TERNARY_1( - __riscv_vsetvlmax_e16m4, - vint16m4_t, - vint32m8_t, - vint16m8_t, - __riscv_vle16_v_i16m4, - __riscv_vle32_v_i32m8, - __riscv_vreinterpret_v_i32m8_i16m8, - __riscv_vget_v_i16m8_i16m4, - __riscv_vwmacc_vv_i32m8, - __riscv_vse32_v_i32m8, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_OVERLAP_X2) - -/* ternary_0: the accumulator occupies the whole destination register group and - is live when the narrowed sources are read, so no source can be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v16,v0,v4([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v0,v28,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v24,v16,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v16,v8,v12([^0-9]|$)} 1 } } */ - -/* ternary_1: each narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the sources would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v16,v20,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v8,v12,v4([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-mf2.c deleted file mode 100644 index f90ed36ffa6d..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-mf2.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e16m1, - vint16mf2_t, - vint32m1_t, - __riscv_vle16_v_i16mf2, - __riscv_vle32_v_i32m1, - __riscv_vwmacc_vv_i32m1, - __riscv_vse32_v_i32m1, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap either source at all. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv} 16 } } */ -/* { dg-final { scan-assembler-not {vwmacc\.vv\s+(v[0-9]+),\1,} } } */ -/* { dg-final { scan-assembler-not {vwmacc\.vv\s+(v[0-9]+),v[0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-mf4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-mf4.c deleted file mode 100644 index 6f7544fd19d9..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-mf4.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e16m1, - vint16mf4_t, - vint32mf2_t, - __riscv_vle16_v_i16mf4, - __riscv_vle32_v_i32mf2, - __riscv_vwmacc_vv_i32mf2, - __riscv_vse32_v_i32mf2, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap either source at all. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv} 16 } } */ -/* { dg-final { scan-assembler-not {vwmacc\.vv\s+(v[0-9]+),\1,} } } */ -/* { dg-final { scan-assembler-not {vwmacc\.vv\s+(v[0-9]+),v[0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i32-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i32-m1.c deleted file mode 100644 index bfd25e177d8a..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i32-m1.c +++ /dev/null @@ -1,57 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e32m1, - vint32m1_t, - vint64m2_t, - __riscv_vle32_v_i32m1, - __riscv_vle64_v_i64m2, - __riscv_vwmacc_vv_i64m2, - __riscv_vse64_v_i64m2, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X16) - -DEF_GROUP_OVERLAP_TERNARY_1( - __riscv_vsetvlmax_e32m1, - vint32m1_t, - vint64m2_t, - vint32m2_t, - __riscv_vle32_v_i32m1, - __riscv_vle64_v_i64m2, - __riscv_vreinterpret_v_i64m2_i32m2, - __riscv_vget_v_i32m2_i32m1, - __riscv_vwmacc_vv_i64m2, - __riscv_vse64_v_i64m2, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_OVERLAP_X2) - -/* ternary_0: the accumulator occupies the whole destination register group and - is live when the narrowed sources are read, so no source can be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v12,v30,v29([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v4,v16,v15([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v2,v0,v31([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v8,v14,v1([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v30,v28,v27([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v28,v26,v25([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v6,v20,v19([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v26,v24,v23([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v2,v18,v17([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v10,v1,v15([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v24,v22,v21([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v14,v19,v17([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v16,v21,v23([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v18,v20,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v20,v0,v1([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v22,v0,v1([^0-9]|$)} 1 } } */ - -/* ternary_1: each narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the sources would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v4,v5,v8([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v2,v3,v1([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i32-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i32-m2.c deleted file mode 100644 index a24c7410bc02..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i32-m2.c +++ /dev/null @@ -1,49 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e32m2, - vint32m2_t, - vint64m4_t, - __riscv_vle32_v_i32m2, - __riscv_vle64_v_i64m4, - __riscv_vwmacc_vv_i64m4, - __riscv_vse64_v_i64m4, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X8) - -DEF_GROUP_OVERLAP_TERNARY_1( - __riscv_vsetvlmax_e32m2, - vint32m2_t, - vint64m4_t, - vint32m4_t, - __riscv_vle32_v_i32m2, - __riscv_vle64_v_i64m4, - __riscv_vreinterpret_v_i64m4_i32m4, - __riscv_vget_v_i32m4_i32m2, - __riscv_vwmacc_vv_i64m4, - __riscv_vse64_v_i64m4, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_OVERLAP_X2) - -/* ternary_0: the accumulator occupies the whole destination register group and - is live when the narrowed sources are read, so no source can be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v8,v0,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v0,v28,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v28,v24,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v24,v20,v18([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v20,v16,v14([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v16,v12,v10([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v12,v8,v6([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v8,v4,v2([^0-9]|$)} 1 } } */ - -/* ternary_1: each narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the sources would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v8,v10,v16([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v4,v6,v2([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i32-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i32-m4.c deleted file mode 100644 index 17490d331e0c..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i32-m4.c +++ /dev/null @@ -1,45 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e32m4, - vint32m4_t, - vint64m8_t, - __riscv_vle32_v_i32m4, - __riscv_vle64_v_i64m8, - __riscv_vwmacc_vv_i64m8, - __riscv_vse64_v_i64m8, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X4) - -DEF_GROUP_OVERLAP_TERNARY_1( - __riscv_vsetvlmax_e32m4, - vint32m4_t, - vint64m8_t, - vint32m8_t, - __riscv_vle32_v_i32m4, - __riscv_vle64_v_i64m8, - __riscv_vreinterpret_v_i64m8_i32m8, - __riscv_vget_v_i32m8_i32m4, - __riscv_vwmacc_vv_i64m8, - __riscv_vse64_v_i64m8, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_OVERLAP_X2) - -/* ternary_0: the accumulator occupies the whole destination register group and - is live when the narrowed sources are read, so no source can be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v16,v0,v4([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v0,v28,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v24,v16,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v16,v8,v12([^0-9]|$)} 1 } } */ - -/* ternary_1: each narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the sources would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v16,v20,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v8,v12,v4([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i32-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i32-mf2.c deleted file mode 100644 index 2b7c19cd5372..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i32-mf2.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e32m1, - vint32mf2_t, - vint64m1_t, - __riscv_vle32_v_i32mf2, - __riscv_vle64_v_i64m1, - __riscv_vwmacc_vv_i64m1, - __riscv_vse64_v_i64m1, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap either source at all. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv} 16 } } */ -/* { dg-final { scan-assembler-not {vwmacc\.vv\s+(v[0-9]+),\1,} } } */ -/* { dg-final { scan-assembler-not {vwmacc\.vv\s+(v[0-9]+),v[0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-m1.c deleted file mode 100644 index a6399818a70d..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-m1.c +++ /dev/null @@ -1,57 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e8m1, - vint8m1_t, - vint16m2_t, - __riscv_vle8_v_i8m1, - __riscv_vle16_v_i16m2, - __riscv_vwmacc_vv_i16m2, - __riscv_vse16_v_i16m2, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X16) - -DEF_GROUP_OVERLAP_TERNARY_1( - __riscv_vsetvlmax_e8m1, - vint8m1_t, - vint16m2_t, - vint8m2_t, - __riscv_vle8_v_i8m1, - __riscv_vle16_v_i16m2, - __riscv_vreinterpret_v_i16m2_i8m2, - __riscv_vget_v_i8m2_i8m1, - __riscv_vwmacc_vv_i16m2, - __riscv_vse16_v_i16m2, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_OVERLAP_X2) - -/* ternary_0: the accumulator occupies the whole destination register group and - is live when the narrowed sources are read, so no source can be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v12,v30,v29([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v4,v16,v15([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v2,v0,v31([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v8,v14,v1([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v30,v28,v27([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v28,v26,v25([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v6,v20,v19([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v26,v24,v23([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v2,v18,v17([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v10,v1,v15([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v24,v22,v21([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v14,v19,v17([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v16,v21,v23([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v18,v20,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v20,v0,v1([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v22,v0,v1([^0-9]|$)} 1 } } */ - -/* ternary_1: each narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the sources would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v4,v5,v8([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v2,v3,v1([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-m2.c deleted file mode 100644 index a8e4628a8c5e..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-m2.c +++ /dev/null @@ -1,49 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e8m2, - vint8m2_t, - vint16m4_t, - __riscv_vle8_v_i8m2, - __riscv_vle16_v_i16m4, - __riscv_vwmacc_vv_i16m4, - __riscv_vse16_v_i16m4, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X8) - -DEF_GROUP_OVERLAP_TERNARY_1( - __riscv_vsetvlmax_e8m2, - vint8m2_t, - vint16m4_t, - vint8m4_t, - __riscv_vle8_v_i8m2, - __riscv_vle16_v_i16m4, - __riscv_vreinterpret_v_i16m4_i8m4, - __riscv_vget_v_i8m4_i8m2, - __riscv_vwmacc_vv_i16m4, - __riscv_vse16_v_i16m4, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_OVERLAP_X2) - -/* ternary_0: the accumulator occupies the whole destination register group and - is live when the narrowed sources are read, so no source can be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v8,v0,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v0,v28,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v28,v24,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v24,v20,v18([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v20,v16,v14([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v16,v12,v10([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v12,v8,v6([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v8,v4,v2([^0-9]|$)} 1 } } */ - -/* ternary_1: each narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the sources would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v8,v10,v16([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v4,v6,v2([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-m4.c deleted file mode 100644 index 67c647f4ca80..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-m4.c +++ /dev/null @@ -1,45 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e8m4, - vint8m4_t, - vint16m8_t, - __riscv_vle8_v_i8m4, - __riscv_vle16_v_i16m8, - __riscv_vwmacc_vv_i16m8, - __riscv_vse16_v_i16m8, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X4) - -DEF_GROUP_OVERLAP_TERNARY_1( - __riscv_vsetvlmax_e8m4, - vint8m4_t, - vint16m8_t, - vint8m8_t, - __riscv_vle8_v_i8m4, - __riscv_vle16_v_i16m8, - __riscv_vreinterpret_v_i16m8_i8m8, - __riscv_vget_v_i8m8_i8m4, - __riscv_vwmacc_vv_i16m8, - __riscv_vse16_v_i16m8, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_OVERLAP_X2) - -/* ternary_0: the accumulator occupies the whole destination register group and - is live when the narrowed sources are read, so no source can be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v16,v0,v4([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v0,v28,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v24,v16,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v16,v8,v12([^0-9]|$)} 1 } } */ - -/* ternary_1: each narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the sources would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v16,v20,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vv\s+v8,v12,v4([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-mf2.c deleted file mode 100644 index c0404d74b4aa..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-mf2.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e8m1, - vint8mf2_t, - vint16m1_t, - __riscv_vle8_v_i8mf2, - __riscv_vle16_v_i16m1, - __riscv_vwmacc_vv_i16m1, - __riscv_vse16_v_i16m1, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap either source at all. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv} 16 } } */ -/* { dg-final { scan-assembler-not {vwmacc\.vv\s+(v[0-9]+),\1,} } } */ -/* { dg-final { scan-assembler-not {vwmacc\.vv\s+(v[0-9]+),v[0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-mf4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-mf4.c deleted file mode 100644 index 11bce6b79a96..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-mf4.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e8m1, - vint8mf4_t, - vint16mf2_t, - __riscv_vle8_v_i8mf4, - __riscv_vle16_v_i16mf2, - __riscv_vwmacc_vv_i16mf2, - __riscv_vse16_v_i16mf2, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap either source at all. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv} 16 } } */ -/* { dg-final { scan-assembler-not {vwmacc\.vv\s+(v[0-9]+),\1,} } } */ -/* { dg-final { scan-assembler-not {vwmacc\.vv\s+(v[0-9]+),v[0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-mf8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-mf8.c deleted file mode 100644 index f0704ada8050..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-mf8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e8m1, - vint8mf8_t, - vint16mf4_t, - __riscv_vle8_v_i8mf8, - __riscv_vle16_v_i16mf4, - __riscv_vwmacc_vv_i16mf4, - __riscv_vse16_v_i16mf4, - vwmacc_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap either source at all. */ -/* { dg-final { scan-assembler-times {vwmacc\.vv} 16 } } */ -/* { dg-final { scan-assembler-not {vwmacc\.vv\s+(v[0-9]+),\1,} } } */ -/* { dg-final { scan-assembler-not {vwmacc\.vv\s+(v[0-9]+),v[0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-m1.c deleted file mode 100644 index b0db1a9fecc3..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-m1.c +++ /dev/null @@ -1,57 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e16m1, - vuint16m1_t, - vuint32m2_t, - __riscv_vle16_v_u16m1, - __riscv_vle32_v_u32m2, - __riscv_vwmaccu_vv_u32m2, - __riscv_vse32_v_u32m2, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X16) - -DEF_GROUP_OVERLAP_TERNARY_1( - __riscv_vsetvlmax_e16m1, - vuint16m1_t, - vuint32m2_t, - vuint16m2_t, - __riscv_vle16_v_u16m1, - __riscv_vle32_v_u32m2, - __riscv_vreinterpret_v_u32m2_u16m2, - __riscv_vget_v_u16m2_u16m1, - __riscv_vwmaccu_vv_u32m2, - __riscv_vse32_v_u32m2, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_OVERLAP_X2) - -/* ternary_0: the accumulator occupies the whole destination register group and - is live when the narrowed sources are read, so no source can be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v12,v30,v29([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v4,v16,v15([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v2,v0,v31([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v8,v14,v1([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v30,v28,v27([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v28,v26,v25([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v6,v20,v19([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v26,v24,v23([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v2,v18,v17([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v10,v1,v15([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v24,v22,v21([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v14,v19,v17([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v16,v21,v23([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v18,v20,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v20,v0,v1([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v22,v0,v1([^0-9]|$)} 1 } } */ - -/* ternary_1: each narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the sources would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v4,v5,v8([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v2,v3,v1([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-m2.c deleted file mode 100644 index c981b3a681e1..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-m2.c +++ /dev/null @@ -1,49 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e16m2, - vuint16m2_t, - vuint32m4_t, - __riscv_vle16_v_u16m2, - __riscv_vle32_v_u32m4, - __riscv_vwmaccu_vv_u32m4, - __riscv_vse32_v_u32m4, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X8) - -DEF_GROUP_OVERLAP_TERNARY_1( - __riscv_vsetvlmax_e16m2, - vuint16m2_t, - vuint32m4_t, - vuint16m4_t, - __riscv_vle16_v_u16m2, - __riscv_vle32_v_u32m4, - __riscv_vreinterpret_v_u32m4_u16m4, - __riscv_vget_v_u16m4_u16m2, - __riscv_vwmaccu_vv_u32m4, - __riscv_vse32_v_u32m4, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_OVERLAP_X2) - -/* ternary_0: the accumulator occupies the whole destination register group and - is live when the narrowed sources are read, so no source can be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v8,v0,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v0,v28,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v28,v24,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v24,v20,v18([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v20,v16,v14([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v16,v12,v10([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v12,v8,v6([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v8,v4,v2([^0-9]|$)} 1 } } */ - -/* ternary_1: each narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the sources would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v8,v10,v16([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v4,v6,v2([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-m4.c deleted file mode 100644 index 39f42879382b..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-m4.c +++ /dev/null @@ -1,45 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e16m4, - vuint16m4_t, - vuint32m8_t, - __riscv_vle16_v_u16m4, - __riscv_vle32_v_u32m8, - __riscv_vwmaccu_vv_u32m8, - __riscv_vse32_v_u32m8, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X4) - -DEF_GROUP_OVERLAP_TERNARY_1( - __riscv_vsetvlmax_e16m4, - vuint16m4_t, - vuint32m8_t, - vuint16m8_t, - __riscv_vle16_v_u16m4, - __riscv_vle32_v_u32m8, - __riscv_vreinterpret_v_u32m8_u16m8, - __riscv_vget_v_u16m8_u16m4, - __riscv_vwmaccu_vv_u32m8, - __riscv_vse32_v_u32m8, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_OVERLAP_X2) - -/* ternary_0: the accumulator occupies the whole destination register group and - is live when the narrowed sources are read, so no source can be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v16,v0,v4([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v0,v28,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v24,v16,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v16,v8,v12([^0-9]|$)} 1 } } */ - -/* ternary_1: each narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the sources would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v16,v20,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v8,v12,v4([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-mf2.c deleted file mode 100644 index 9e5fa5fe3a44..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-mf2.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e16m1, - vuint16mf2_t, - vuint32m1_t, - __riscv_vle16_v_u16mf2, - __riscv_vle32_v_u32m1, - __riscv_vwmaccu_vv_u32m1, - __riscv_vse32_v_u32m1, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap either source at all. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv} 16 } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vv\s+(v[0-9]+),\1,} } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vv\s+(v[0-9]+),v[0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-mf4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-mf4.c deleted file mode 100644 index 52a70b34539e..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-mf4.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e16m1, - vuint16mf4_t, - vuint32mf2_t, - __riscv_vle16_v_u16mf4, - __riscv_vle32_v_u32mf2, - __riscv_vwmaccu_vv_u32mf2, - __riscv_vse32_v_u32mf2, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap either source at all. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv} 16 } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vv\s+(v[0-9]+),\1,} } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vv\s+(v[0-9]+),v[0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u32-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u32-m1.c deleted file mode 100644 index 4e973657c6b2..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u32-m1.c +++ /dev/null @@ -1,57 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e32m1, - vuint32m1_t, - vuint64m2_t, - __riscv_vle32_v_u32m1, - __riscv_vle64_v_u64m2, - __riscv_vwmaccu_vv_u64m2, - __riscv_vse64_v_u64m2, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X16) - -DEF_GROUP_OVERLAP_TERNARY_1( - __riscv_vsetvlmax_e32m1, - vuint32m1_t, - vuint64m2_t, - vuint32m2_t, - __riscv_vle32_v_u32m1, - __riscv_vle64_v_u64m2, - __riscv_vreinterpret_v_u64m2_u32m2, - __riscv_vget_v_u32m2_u32m1, - __riscv_vwmaccu_vv_u64m2, - __riscv_vse64_v_u64m2, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_OVERLAP_X2) - -/* ternary_0: the accumulator occupies the whole destination register group and - is live when the narrowed sources are read, so no source can be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v12,v30,v29([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v4,v16,v15([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v2,v0,v31([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v8,v14,v1([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v30,v28,v27([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v28,v26,v25([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v6,v20,v19([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v26,v24,v23([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v2,v18,v17([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v10,v1,v15([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v24,v22,v21([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v14,v19,v17([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v16,v21,v23([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v18,v20,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v20,v0,v1([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v22,v0,v1([^0-9]|$)} 1 } } */ - -/* ternary_1: each narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the sources would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v4,v5,v8([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v2,v3,v1([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u32-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u32-m2.c deleted file mode 100644 index 450de0c6fbf3..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u32-m2.c +++ /dev/null @@ -1,49 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e32m2, - vuint32m2_t, - vuint64m4_t, - __riscv_vle32_v_u32m2, - __riscv_vle64_v_u64m4, - __riscv_vwmaccu_vv_u64m4, - __riscv_vse64_v_u64m4, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X8) - -DEF_GROUP_OVERLAP_TERNARY_1( - __riscv_vsetvlmax_e32m2, - vuint32m2_t, - vuint64m4_t, - vuint32m4_t, - __riscv_vle32_v_u32m2, - __riscv_vle64_v_u64m4, - __riscv_vreinterpret_v_u64m4_u32m4, - __riscv_vget_v_u32m4_u32m2, - __riscv_vwmaccu_vv_u64m4, - __riscv_vse64_v_u64m4, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_OVERLAP_X2) - -/* ternary_0: the accumulator occupies the whole destination register group and - is live when the narrowed sources are read, so no source can be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v8,v0,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v0,v28,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v28,v24,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v24,v20,v18([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v20,v16,v14([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v16,v12,v10([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v12,v8,v6([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v8,v4,v2([^0-9]|$)} 1 } } */ - -/* ternary_1: each narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the sources would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v8,v10,v16([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v4,v6,v2([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u32-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u32-m4.c deleted file mode 100644 index b2a3852f28cd..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u32-m4.c +++ /dev/null @@ -1,45 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e32m4, - vuint32m4_t, - vuint64m8_t, - __riscv_vle32_v_u32m4, - __riscv_vle64_v_u64m8, - __riscv_vwmaccu_vv_u64m8, - __riscv_vse64_v_u64m8, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X4) - -DEF_GROUP_OVERLAP_TERNARY_1( - __riscv_vsetvlmax_e32m4, - vuint32m4_t, - vuint64m8_t, - vuint32m8_t, - __riscv_vle32_v_u32m4, - __riscv_vle64_v_u64m8, - __riscv_vreinterpret_v_u64m8_u32m8, - __riscv_vget_v_u32m8_u32m4, - __riscv_vwmaccu_vv_u64m8, - __riscv_vse64_v_u64m8, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_OVERLAP_X2) - -/* ternary_0: the accumulator occupies the whole destination register group and - is live when the narrowed sources are read, so no source can be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v16,v0,v4([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v0,v28,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v24,v16,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v16,v8,v12([^0-9]|$)} 1 } } */ - -/* ternary_1: each narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the sources would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v16,v20,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v8,v12,v4([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u32-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u32-mf2.c deleted file mode 100644 index d10c071d49aa..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u32-mf2.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e32m1, - vuint32mf2_t, - vuint64m1_t, - __riscv_vle32_v_u32mf2, - __riscv_vle64_v_u64m1, - __riscv_vwmaccu_vv_u64m1, - __riscv_vse64_v_u64m1, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap either source at all. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv} 16 } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vv\s+(v[0-9]+),\1,} } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vv\s+(v[0-9]+),v[0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-m1.c deleted file mode 100644 index 640d616d6757..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-m1.c +++ /dev/null @@ -1,57 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e8m1, - vuint8m1_t, - vuint16m2_t, - __riscv_vle8_v_u8m1, - __riscv_vle16_v_u16m2, - __riscv_vwmaccu_vv_u16m2, - __riscv_vse16_v_u16m2, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X16) - -DEF_GROUP_OVERLAP_TERNARY_1( - __riscv_vsetvlmax_e8m1, - vuint8m1_t, - vuint16m2_t, - vuint8m2_t, - __riscv_vle8_v_u8m1, - __riscv_vle16_v_u16m2, - __riscv_vreinterpret_v_u16m2_u8m2, - __riscv_vget_v_u8m2_u8m1, - __riscv_vwmaccu_vv_u16m2, - __riscv_vse16_v_u16m2, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_OVERLAP_X2) - -/* ternary_0: the accumulator occupies the whole destination register group and - is live when the narrowed sources are read, so no source can be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v12,v30,v29([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v4,v16,v15([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v2,v0,v31([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v8,v14,v1([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v30,v28,v27([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v28,v26,v25([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v6,v20,v19([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v26,v24,v23([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v2,v18,v17([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v10,v1,v15([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v24,v22,v21([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v14,v19,v17([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v16,v21,v23([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v18,v20,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v20,v0,v1([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v22,v0,v1([^0-9]|$)} 1 } } */ - -/* ternary_1: each narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the sources would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v4,v5,v8([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v2,v3,v1([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-m2.c deleted file mode 100644 index f26a889dc219..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-m2.c +++ /dev/null @@ -1,49 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e8m2, - vuint8m2_t, - vuint16m4_t, - __riscv_vle8_v_u8m2, - __riscv_vle16_v_u16m4, - __riscv_vwmaccu_vv_u16m4, - __riscv_vse16_v_u16m4, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X8) - -DEF_GROUP_OVERLAP_TERNARY_1( - __riscv_vsetvlmax_e8m2, - vuint8m2_t, - vuint16m4_t, - vuint8m4_t, - __riscv_vle8_v_u8m2, - __riscv_vle16_v_u16m4, - __riscv_vreinterpret_v_u16m4_u8m4, - __riscv_vget_v_u8m4_u8m2, - __riscv_vwmaccu_vv_u16m4, - __riscv_vse16_v_u16m4, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_OVERLAP_X2) - -/* ternary_0: the accumulator occupies the whole destination register group and - is live when the narrowed sources are read, so no source can be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v8,v0,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v0,v28,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v28,v24,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v24,v20,v18([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v20,v16,v14([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v16,v12,v10([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v12,v8,v6([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v8,v4,v2([^0-9]|$)} 1 } } */ - -/* ternary_1: each narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the sources would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v8,v10,v16([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v4,v6,v2([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-m4.c deleted file mode 100644 index ca257a860416..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-m4.c +++ /dev/null @@ -1,45 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e8m4, - vuint8m4_t, - vuint16m8_t, - __riscv_vle8_v_u8m4, - __riscv_vle16_v_u16m8, - __riscv_vwmaccu_vv_u16m8, - __riscv_vse16_v_u16m8, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X4) - -DEF_GROUP_OVERLAP_TERNARY_1( - __riscv_vsetvlmax_e8m4, - vuint8m4_t, - vuint16m8_t, - vuint8m8_t, - __riscv_vle8_v_u8m4, - __riscv_vle16_v_u16m8, - __riscv_vreinterpret_v_u16m8_u8m8, - __riscv_vget_v_u8m8_u8m4, - __riscv_vwmaccu_vv_u16m8, - __riscv_vse16_v_u16m8, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_OVERLAP_X2) - -/* ternary_0: the accumulator occupies the whole destination register group and - is live when the narrowed sources are read, so no source can be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v16,v0,v4([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v0,v28,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v24,v16,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v16,v8,v12([^0-9]|$)} 1 } } */ - -/* ternary_1: each narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the sources would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v16,v20,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv\s+v8,v12,v4([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-mf2.c deleted file mode 100644 index 49e1731e0c5f..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-mf2.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e8m1, - vuint8mf2_t, - vuint16m1_t, - __riscv_vle8_v_u8mf2, - __riscv_vle16_v_u16m1, - __riscv_vwmaccu_vv_u16m1, - __riscv_vse16_v_u16m1, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap either source at all. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv} 16 } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vv\s+(v[0-9]+),\1,} } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vv\s+(v[0-9]+),v[0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-mf4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-mf4.c deleted file mode 100644 index 00ecea9af4db..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-mf4.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e8m1, - vuint8mf4_t, - vuint16mf2_t, - __riscv_vle8_v_u8mf4, - __riscv_vle16_v_u16mf2, - __riscv_vwmaccu_vv_u16mf2, - __riscv_vse16_v_u16mf2, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap either source at all. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv} 16 } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vv\s+(v[0-9]+),\1,} } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vv\s+(v[0-9]+),v[0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-mf8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-mf8.c deleted file mode 100644 index 9a8f4c8a5a68..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-mf8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_0( - __riscv_vsetvlmax_e8m1, - vuint8mf8_t, - vuint16mf4_t, - __riscv_vle8_v_u8mf8, - __riscv_vle16_v_u16mf4, - __riscv_vwmaccu_vv_u16mf4, - __riscv_vse16_v_u16mf4, - vwmaccu_vv, - LOOP_DUAL_WIDEN_TERNARY_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap either source at all. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vv} 16 } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vv\s+(v[0-9]+),\1,} } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vv\s+(v[0-9]+),v[0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-49.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-49.c deleted file mode 100644 index 9eec487e9f09..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-49.c +++ /dev/null @@ -1,59 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */ - -#include "riscv_vector.h" - -void -foo (void *in, void *out, int n) -{ - for (int i = 0; i < n; i++) - { - asm volatile("nop" ::: "memory"); - vint16m4_t v0 = __riscv_vle16_v_i16m4 (in, 4);in+=100; - vint8m2_t v0_n = __riscv_vreinterpret_v_i16m2_i8m2 (__riscv_vget_v_i16m4_i16m2 (v0, 1)); - v0 = __riscv_vwmacc_vv_i16m4_tu (v0, v0_n, v0_n, 4); - asm volatile("nop" ::: "memory"); - vint16m4_t v1 = __riscv_vle16_v_i16m4 (in, 4);in+=100; - vint8m2_t v1_n = __riscv_vreinterpret_v_i16m2_i8m2 (__riscv_vget_v_i16m4_i16m2 (v1, 1)); - v1 = __riscv_vwmacc_vv_i16m4_tu (v1, v1_n, v1_n, 4); - asm volatile("nop" ::: "memory"); - vint16m4_t v2 = __riscv_vle16_v_i16m4 (in, 4);in+=100; - vint8m2_t v2_n = __riscv_vreinterpret_v_i16m2_i8m2 (__riscv_vget_v_i16m4_i16m2 (v2, 1)); - v2 = __riscv_vwmacc_vv_i16m4_tu (v2, v2_n, v2_n, 4); - asm volatile("nop" ::: "memory"); - vint16m4_t v3 = __riscv_vle16_v_i16m4 (in, 4);in+=100; - vint8m2_t v3_n = __riscv_vreinterpret_v_i16m2_i8m2 (__riscv_vget_v_i16m4_i16m2 (v3, 1)); - v3 = __riscv_vwmacc_vv_i16m4_tu (v3, v3_n, v3_n, 4); - asm volatile("nop" ::: "memory"); - vint16m4_t v4 = __riscv_vle16_v_i16m4 (in, 4);in+=100; - vint8m2_t v4_n = __riscv_vreinterpret_v_i16m2_i8m2 (__riscv_vget_v_i16m4_i16m2 (v4, 1)); - v4 = __riscv_vwmacc_vv_i16m4_tu (v4, v4_n, v4_n, 4); - asm volatile("nop" ::: "memory"); - vint16m4_t v5 = __riscv_vle16_v_i16m4 (in, 4);in+=100; - vint8m2_t v5_n = __riscv_vreinterpret_v_i16m2_i8m2 (__riscv_vget_v_i16m4_i16m2 (v5, 1)); - v5 = __riscv_vwmacc_vv_i16m4_tu (v5, v5_n, v5_n, 4); - asm volatile("nop" ::: "memory"); - vint16m4_t v6 = __riscv_vle16_v_i16m4 (in, 4);in+=100; - vint8m2_t v6_n = __riscv_vreinterpret_v_i16m2_i8m2 (__riscv_vget_v_i16m4_i16m2 (v6, 1)); - v6 = __riscv_vwmacc_vv_i16m4_tu (v6, v6_n, v6_n, 4); - asm volatile("nop" ::: "memory"); - vint8m2_t v7_n = __riscv_vle8_v_i8m2 (in, 4);in+=100; - vint16m4_t v7 = __riscv_vwcvt_x_x_v_i16m4 (v7_n, 4); - - asm volatile("nop" ::: "memory"); - __riscv_vsse16_v_i16m4 (out, 4, v0, 4);out+=100; - __riscv_vsse16_v_i16m4 (out, 4, v1, 4);out+=100; - __riscv_vsse16_v_i16m4 (out, 4, v2, 4);out+=100; - __riscv_vsse16_v_i16m4 (out, 4, v3, 4);out+=100; - __riscv_vsse16_v_i16m4 (out, 4, v4, 4);out+=100; - __riscv_vsse16_v_i16m4 (out, 4, v5, 4);out+=100; - __riscv_vsse16_v_i16m4 (out, 4, v6, 4);out+=100; - __riscv_vsse16_v_i16m4 (out, 4, v7, 4);out+=100; - } -} - -/* { dg-final { scan-assembler-not {vmv1r} } } */ -/* { dg-final { scan-assembler-not {vmv2r} } } */ -/* { dg-final { scan-assembler-not {vmv4r} { xfail riscv*-*-* } } } */ -/* { dg-final { scan-assembler-not {vmv8r} } } */ -/* { dg-final { scan-assembler-not {csrr} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-50.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-50.c deleted file mode 100644 index 49c779128fb4..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-50.c +++ /dev/null @@ -1,59 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */ - -#include "riscv_vector.h" - -void -foo (void *in, void *out, int n) -{ - for (int i = 0; i < n; i++) - { - asm volatile("nop" ::: "memory"); - vuint16m4_t v0 = __riscv_vle16_v_u16m4 (in, 4);in+=100; - vuint8m2_t v0_n = __riscv_vreinterpret_v_u16m2_u8m2 (__riscv_vget_v_u16m4_u16m2 (v0, 1)); - v0 = __riscv_vwmaccu_vv_u16m4_tu (v0, v0_n, v0_n, 4); - asm volatile("nop" ::: "memory"); - vuint16m4_t v1 = __riscv_vle16_v_u16m4 (in, 4);in+=100; - vuint8m2_t v1_n = __riscv_vreinterpret_v_u16m2_u8m2 (__riscv_vget_v_u16m4_u16m2 (v1, 1)); - v1 = __riscv_vwmaccu_vv_u16m4_tu (v1, v1_n, v1_n, 4); - asm volatile("nop" ::: "memory"); - vuint16m4_t v2 = __riscv_vle16_v_u16m4 (in, 4);in+=100; - vuint8m2_t v2_n = __riscv_vreinterpret_v_u16m2_u8m2 (__riscv_vget_v_u16m4_u16m2 (v2, 1)); - v2 = __riscv_vwmaccu_vv_u16m4_tu (v2, v2_n, v2_n, 4); - asm volatile("nop" ::: "memory"); - vuint16m4_t v3 = __riscv_vle16_v_u16m4 (in, 4);in+=100; - vuint8m2_t v3_n = __riscv_vreinterpret_v_u16m2_u8m2 (__riscv_vget_v_u16m4_u16m2 (v3, 1)); - v3 = __riscv_vwmaccu_vv_u16m4_tu (v3, v3_n, v3_n, 4); - asm volatile("nop" ::: "memory"); - vuint16m4_t v4 = __riscv_vle16_v_u16m4 (in, 4);in+=100; - vuint8m2_t v4_n = __riscv_vreinterpret_v_u16m2_u8m2 (__riscv_vget_v_u16m4_u16m2 (v4, 1)); - v4 = __riscv_vwmaccu_vv_u16m4_tu (v4, v4_n, v4_n, 4); - asm volatile("nop" ::: "memory"); - vuint16m4_t v5 = __riscv_vle16_v_u16m4 (in, 4);in+=100; - vuint8m2_t v5_n = __riscv_vreinterpret_v_u16m2_u8m2 (__riscv_vget_v_u16m4_u16m2 (v5, 1)); - v5 = __riscv_vwmaccu_vv_u16m4_tu (v5, v5_n, v5_n, 4); - asm volatile("nop" ::: "memory"); - vuint16m4_t v6 = __riscv_vle16_v_u16m4 (in, 4);in+=100; - vuint8m2_t v6_n = __riscv_vreinterpret_v_u16m2_u8m2 (__riscv_vget_v_u16m4_u16m2 (v6, 1)); - v6 = __riscv_vwmaccu_vv_u16m4_tu (v6, v6_n, v6_n, 4); - asm volatile("nop" ::: "memory"); - vuint8m2_t v7_n = __riscv_vle8_v_u8m2 (in, 4);in+=100; - vuint16m4_t v7 = __riscv_vwcvtu_x_x_v_u16m4 (v7_n, 4); - - asm volatile("nop" ::: "memory"); - __riscv_vsse16_v_u16m4 (out, 4, v0, 4);out+=100; - __riscv_vsse16_v_u16m4 (out, 4, v1, 4);out+=100; - __riscv_vsse16_v_u16m4 (out, 4, v2, 4);out+=100; - __riscv_vsse16_v_u16m4 (out, 4, v3, 4);out+=100; - __riscv_vsse16_v_u16m4 (out, 4, v4, 4);out+=100; - __riscv_vsse16_v_u16m4 (out, 4, v5, 4);out+=100; - __riscv_vsse16_v_u16m4 (out, 4, v6, 4);out+=100; - __riscv_vsse16_v_u16m4 (out, 4, v7, 4);out+=100; - } -} - -/* { dg-final { scan-assembler-not {vmv1r} } } */ -/* { dg-final { scan-assembler-not {vmv2r} } } */ -/* { dg-final { scan-assembler-not {vmv4r} { xfail riscv*-*-* } } } */ -/* { dg-final { scan-assembler-not {vmv8r} } } */ -/* { dg-final { scan-assembler-not {csrr} } } */
