https://gcc.gnu.org/g:a890119da9c92bae6d87b7fff77a60f3b33835fb
commit r17-5718-ga890119da9c92bae6d87b7fff77a60f3b33835fb Author: Pan Li <[email protected]> Date: Wed Oct 28 10:36:53 2026 +0800 RISC-V: Disable RVV register overlap for vwmaccus.vx [PR target/128162] Revert the register overlap of the widening multiply-add insn vwmaccus.vx and the related test cases. The insn reads the vd as the accumulator with EEW = 2 * SEW, while the vs1 and vs2 are read with EEW = SEW. The section 5.2 of the vector spec reserves any encoding in which one vector register supplies source operands with two or more different EEWs. Thus, the vs1 and vs2 must not overlap the vd register group, even in the highest-numbered part. For example, below asm dump is reserved as the v3 is read with both the EEW = 32 and the EEW = 16. vwmaccus.vx v2,a0,v3 # LMUL = 1, SEW = 16 This reverts commit(s): b933df353a1 RISC-V: Allow RVV register overlap for vwmaccus.vx e485ab3fc8b RISC-V: Add test cases for vwmaccus.vx reg overlap 5983249d806 RISC-V: Add more test cases for vwmaccus.vx PR target/128162 gcc/ChangeLog: * config/riscv/vector.md: Revert Wvr constraint to the early clobber vr. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i16-m1.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i16-m2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i16-m4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i16-mf2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i16-mf4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i32-m1.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i32-m2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i32-m4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i32-mf2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-m1.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-m2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-m4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-mf2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-mf4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-mf8.c: Removed. * gcc.target/riscv/rvv/base/pr112431-57.c: Removed. * gcc.target/riscv/rvv/base/pr112431-58.c: Removed. * gcc.target/riscv/rvv/base/pr112431-37.c: Add xfail back. Signed-off-by: Pan Li <[email protected]> Diff: --- gcc/config/riscv/vector.md | 18 +++---- .../rvv/autovec/group_overlap/vwmaccus_vx-i16-m1.c | 58 -------------------- .../rvv/autovec/group_overlap/vwmaccus_vx-i16-m2.c | 50 ----------------- .../rvv/autovec/group_overlap/vwmaccus_vx-i16-m4.c | 46 ---------------- .../autovec/group_overlap/vwmaccus_vx-i16-mf2.c | 21 -------- .../autovec/group_overlap/vwmaccus_vx-i16-mf4.c | 21 -------- .../rvv/autovec/group_overlap/vwmaccus_vx-i32-m1.c | 58 -------------------- .../rvv/autovec/group_overlap/vwmaccus_vx-i32-m2.c | 50 ----------------- .../rvv/autovec/group_overlap/vwmaccus_vx-i32-m4.c | 46 ---------------- .../autovec/group_overlap/vwmaccus_vx-i32-mf2.c | 21 -------- .../rvv/autovec/group_overlap/vwmaccus_vx-i8-m1.c | 58 -------------------- .../rvv/autovec/group_overlap/vwmaccus_vx-i8-m2.c | 50 ----------------- .../rvv/autovec/group_overlap/vwmaccus_vx-i8-m4.c | 46 ---------------- .../rvv/autovec/group_overlap/vwmaccus_vx-i8-mf2.c | 21 -------- .../rvv/autovec/group_overlap/vwmaccus_vx-i8-mf4.c | 21 -------- .../rvv/autovec/group_overlap/vwmaccus_vx-i8-mf8.c | 21 -------- .../gcc.target/riscv/rvv/base/pr112431-37.c | 6 +-- .../gcc.target/riscv/rvv/base/pr112431-57.c | 62 ---------------------- .../gcc.target/riscv/rvv/base/pr112431-58.c | 62 ---------------------- 19 files changed, 12 insertions(+), 724 deletions(-) diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md index aa886aabeeab..11a9caed8f80 100644 --- a/gcc/config/riscv/vector.md +++ b/gcc/config/riscv/vector.md @@ -6177,24 +6177,24 @@ (set_attr "mode" "<V_DOUBLE_TRUNC>")]) (define_insn "@pred_widen_mul_plusus<mode>_scalar" - [(set (match_operand:VWEXTI 0 "register_operand" "=vr, vd") + [(set (match_operand:VWEXTI 0 "register_operand" "=&vr") (if_then_else:VWEXTI (unspec:<VM> - [(match_operand:<VM> 1 "vector_mask_operand" "Wc1, vm") - (match_operand 5 "vector_length_operand" "rvl,rvl") - (match_operand 6 "const_int_operand" " i, i") - (match_operand 7 "const_int_operand" " i, i") - (match_operand 8 "const_int_operand" " i, i") + [(match_operand:<VM> 1 "vector_mask_operand" "vmWc1") + (match_operand 5 "vector_length_operand" " rvl") + (match_operand 6 "const_int_operand" " i") + (match_operand 7 "const_int_operand" " i") + (match_operand 8 "const_int_operand" " i") (reg:SI VL_REGNUM) (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE) (plus:VWEXTI (mult:VWEXTI (zero_extend:VWEXTI (vec_duplicate:<V_DOUBLE_TRUNC> - (match_operand:<VSUBEL> 3 "register_operand" " r, r"))) + (match_operand:<VSUBEL> 3 "register_operand" " r"))) (sign_extend:VWEXTI - (match_operand:<V_DOUBLE_TRUNC> 4 "register_operand" "Wvr,Wvr"))) - (match_operand:VWEXTI 2 "register_operand" " 0, 0")) + (match_operand:<V_DOUBLE_TRUNC> 4 "register_operand" " vr"))) + (match_operand:VWEXTI 2 "register_operand" " 0")) (match_dup 2)))] "TARGET_VECTOR" "vwmaccus.vx\t%0,%3,%4%p1" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i16-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i16-m1.c deleted file mode 100644 index f3c542f7862e..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i16-m1.c +++ /dev/null @@ -1,58 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e16m1, - vint16m1_t, - vint32m2_t, - uint16_t, - __riscv_vle16_v_i16m1, - __riscv_vle32_v_i32m2, - __riscv_vwmaccus_vx_i32m2, - __riscv_vse32_v_i32m2, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e16m1, - vint16m1_t, - vint32m2_t, - vint16m2_t, - uint16_t, - __riscv_vle32_v_i32m2, - __riscv_vreinterpret_v_i32m2_i16m2, - __riscv_vget_v_i16m2_i16m1, - __riscv_vwmaccus_vx_i32m2, - __riscv_vse32_v_i32m2, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v6,s0,v27([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v4,s0,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v14,s0,v31([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v12,s0,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v2,s0,v25([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v26,s0,v24([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v10,s0,v29([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v30,s0,v23([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v24,s0,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v8,s0,v28([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v26,s0,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v16,s0,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v22,s0,v21([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v28,s0,v18([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v20,s0,v19([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v18,s0,v1([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v4,a2,v5([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v2,a2,v3([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i16-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i16-m2.c deleted file mode 100644 index 76be9321813a..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i16-m2.c +++ /dev/null @@ -1,50 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e16m2, - vint16m2_t, - vint32m4_t, - uint16_t, - __riscv_vle16_v_i16m2, - __riscv_vle32_v_i32m4, - __riscv_vwmaccus_vx_i32m4, - __riscv_vse32_v_i32m4, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X8) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e16m2, - vint16m2_t, - vint32m4_t, - vint16m4_t, - uint16_t, - __riscv_vle32_v_i32m4, - __riscv_vreinterpret_v_i32m4_i16m4, - __riscv_vget_v_i16m4_i16m2, - __riscv_vwmaccus_vx_i32m4, - __riscv_vse32_v_i32m4, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v12,a2,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v8,a2,v28([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v4,a2,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v16,a2,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v28,a2,v24([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v24,a2,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v28,a2,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v20,a2,v2([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v8,a2,v10([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v4,a2,v6([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i16-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i16-m4.c deleted file mode 100644 index 0598c58ac504..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i16-m4.c +++ /dev/null @@ -1,46 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e16m4, - vint16m4_t, - vint32m8_t, - uint16_t, - __riscv_vle16_v_i16m4, - __riscv_vle32_v_i32m8, - __riscv_vwmaccus_vx_i32m8, - __riscv_vse32_v_i32m8, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X4) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e16m4, - vint16m4_t, - vint32m8_t, - vint16m8_t, - uint16_t, - __riscv_vle32_v_i32m8, - __riscv_vreinterpret_v_i32m8_i16m8, - __riscv_vget_v_i16m8_i16m4, - __riscv_vwmaccus_vx_i32m8, - __riscv_vse32_v_i32m8, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v24,a2,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v16,a2,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v16,a2,v8([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v8,a2,v4([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v16,a2,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v8,a2,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i16-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i16-mf2.c deleted file mode 100644 index 8432b660cb83..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i16-mf2.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e16m1, - vint16mf2_t, - vint32m1_t, - uint16_t, - __riscv_vle16_v_i16mf2, - __riscv_vle32_v_i32m1, - __riscv_vwmaccus_vx_i32m1, - __riscv_vse32_v_i32m1, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap the source at all. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx} 16 } } */ -/* { dg-final { scan-assembler-not {vwmaccus\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i16-mf4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i16-mf4.c deleted file mode 100644 index 8f306e4fc894..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i16-mf4.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e16m1, - vint16mf4_t, - vint32mf2_t, - uint16_t, - __riscv_vle16_v_i16mf4, - __riscv_vle32_v_i32mf2, - __riscv_vwmaccus_vx_i32mf2, - __riscv_vse32_v_i32mf2, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap the source at all. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx} 16 } } */ -/* { dg-final { scan-assembler-not {vwmaccus\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i32-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i32-m1.c deleted file mode 100644 index 0202db0e622a..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i32-m1.c +++ /dev/null @@ -1,58 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e32m1, - vint32m1_t, - vint64m2_t, - uint32_t, - __riscv_vle32_v_i32m1, - __riscv_vle64_v_i64m2, - __riscv_vwmaccus_vx_i64m2, - __riscv_vse64_v_i64m2, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e32m1, - vint32m1_t, - vint64m2_t, - vint32m2_t, - uint32_t, - __riscv_vle64_v_i64m2, - __riscv_vreinterpret_v_i64m2_i32m2, - __riscv_vget_v_i32m2_i32m1, - __riscv_vwmaccus_vx_i64m2, - __riscv_vse64_v_i64m2, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v6,s0,v27([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v4,s0,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v14,s0,v31([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v12,s0,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v2,s0,v25([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v26,s0,v24([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v10,s0,v29([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v30,s0,v23([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v24,s0,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v8,s0,v28([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v26,s0,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v16,s0,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v22,s0,v21([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v28,s0,v18([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v20,s0,v19([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v18,s0,v1([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v4,a2,v5([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v2,a2,v3([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i32-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i32-m2.c deleted file mode 100644 index 4269b027a034..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i32-m2.c +++ /dev/null @@ -1,50 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e32m2, - vint32m2_t, - vint64m4_t, - uint32_t, - __riscv_vle32_v_i32m2, - __riscv_vle64_v_i64m4, - __riscv_vwmaccus_vx_i64m4, - __riscv_vse64_v_i64m4, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X8) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e32m2, - vint32m2_t, - vint64m4_t, - vint32m4_t, - uint32_t, - __riscv_vle64_v_i64m4, - __riscv_vreinterpret_v_i64m4_i32m4, - __riscv_vget_v_i32m4_i32m2, - __riscv_vwmaccus_vx_i64m4, - __riscv_vse64_v_i64m4, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v12,a2,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v8,a2,v28([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v4,a2,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v16,a2,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v28,a2,v24([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v24,a2,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v28,a2,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v20,a2,v2([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v8,a2,v10([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v4,a2,v6([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i32-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i32-m4.c deleted file mode 100644 index 3452089ab08d..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i32-m4.c +++ /dev/null @@ -1,46 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e32m4, - vint32m4_t, - vint64m8_t, - uint32_t, - __riscv_vle32_v_i32m4, - __riscv_vle64_v_i64m8, - __riscv_vwmaccus_vx_i64m8, - __riscv_vse64_v_i64m8, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X4) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e32m4, - vint32m4_t, - vint64m8_t, - vint32m8_t, - uint32_t, - __riscv_vle64_v_i64m8, - __riscv_vreinterpret_v_i64m8_i32m8, - __riscv_vget_v_i32m8_i32m4, - __riscv_vwmaccus_vx_i64m8, - __riscv_vse64_v_i64m8, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v24,a2,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v16,a2,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v16,a2,v8([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v8,a2,v4([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v16,a2,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v8,a2,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i32-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i32-mf2.c deleted file mode 100644 index 584557c7016c..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i32-mf2.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e32m1, - vint32mf2_t, - vint64m1_t, - uint32_t, - __riscv_vle32_v_i32mf2, - __riscv_vle64_v_i64m1, - __riscv_vwmaccus_vx_i64m1, - __riscv_vse64_v_i64m1, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap the source at all. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx} 16 } } */ -/* { dg-final { scan-assembler-not {vwmaccus\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-m1.c deleted file mode 100644 index bffc1c62bd0a..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-m1.c +++ /dev/null @@ -1,58 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e8m1, - vint8m1_t, - vint16m2_t, - uint8_t, - __riscv_vle8_v_i8m1, - __riscv_vle16_v_i16m2, - __riscv_vwmaccus_vx_i16m2, - __riscv_vse16_v_i16m2, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e8m1, - vint8m1_t, - vint16m2_t, - vint8m2_t, - uint8_t, - __riscv_vle16_v_i16m2, - __riscv_vreinterpret_v_i16m2_i8m2, - __riscv_vget_v_i8m2_i8m1, - __riscv_vwmaccus_vx_i16m2, - __riscv_vse16_v_i16m2, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v6,s0,v27([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v4,s0,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v14,s0,v31([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v12,s0,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v2,s0,v25([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v26,s0,v24([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v10,s0,v29([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v30,s0,v23([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v24,s0,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v8,s0,v28([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v26,s0,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v16,s0,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v22,s0,v21([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v28,s0,v18([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v20,s0,v19([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v18,s0,v1([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v4,a2,v5([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v2,a2,v3([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-m2.c deleted file mode 100644 index e9d1dc07fa1f..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-m2.c +++ /dev/null @@ -1,50 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e8m2, - vint8m2_t, - vint16m4_t, - uint8_t, - __riscv_vle8_v_i8m2, - __riscv_vle16_v_i16m4, - __riscv_vwmaccus_vx_i16m4, - __riscv_vse16_v_i16m4, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X8) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e8m2, - vint8m2_t, - vint16m4_t, - vint8m4_t, - uint8_t, - __riscv_vle16_v_i16m4, - __riscv_vreinterpret_v_i16m4_i8m4, - __riscv_vget_v_i8m4_i8m2, - __riscv_vwmaccus_vx_i16m4, - __riscv_vse16_v_i16m4, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v12,a2,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v8,a2,v28([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v4,a2,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v16,a2,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v28,a2,v24([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v24,a2,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v28,a2,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v20,a2,v2([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v8,a2,v10([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v4,a2,v6([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-m4.c deleted file mode 100644 index c72725db0b84..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-m4.c +++ /dev/null @@ -1,46 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e8m4, - vint8m4_t, - vint16m8_t, - uint8_t, - __riscv_vle8_v_i8m4, - __riscv_vle16_v_i16m8, - __riscv_vwmaccus_vx_i16m8, - __riscv_vse16_v_i16m8, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X4) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e8m4, - vint8m4_t, - vint16m8_t, - vint8m8_t, - uint8_t, - __riscv_vle16_v_i16m8, - __riscv_vreinterpret_v_i16m8_i8m8, - __riscv_vget_v_i8m8_i8m4, - __riscv_vwmaccus_vx_i16m8, - __riscv_vse16_v_i16m8, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v24,a2,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v16,a2,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v16,a2,v8([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v8,a2,v4([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v16,a2,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v8,a2,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-mf2.c deleted file mode 100644 index 72982bc6f723..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-mf2.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e8m1, - vint8mf2_t, - vint16m1_t, - uint8_t, - __riscv_vle8_v_i8mf2, - __riscv_vle16_v_i16m1, - __riscv_vwmaccus_vx_i16m1, - __riscv_vse16_v_i16m1, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap the source at all. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx} 16 } } */ -/* { dg-final { scan-assembler-not {vwmaccus\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-mf4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-mf4.c deleted file mode 100644 index bc3aeffdf9f4..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-mf4.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e8m1, - vint8mf4_t, - vint16mf2_t, - uint8_t, - __riscv_vle8_v_i8mf4, - __riscv_vle16_v_i16mf2, - __riscv_vwmaccus_vx_i16mf2, - __riscv_vse16_v_i16mf2, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap the source at all. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx} 16 } } */ -/* { dg-final { scan-assembler-not {vwmaccus\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-mf8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-mf8.c deleted file mode 100644 index a4dfc322f018..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccus_vx-i8-mf8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e8m1, - vint8mf8_t, - vint16mf4_t, - uint8_t, - __riscv_vle8_v_i8mf8, - __riscv_vle16_v_i16mf4, - __riscv_vwmaccus_vx_i16mf4, - __riscv_vse16_v_i16mf4, - vwmaccus_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap the source at all. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx} 16 } } */ -/* { dg-final { scan-assembler-not {vwmaccus\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-37.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-37.c index 6337ff875fe9..66e81ea905af 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-37.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-37.c @@ -97,7 +97,7 @@ foo9 (void *in, void *out) } /* { dg-final { scan-assembler-not {vmv1r} } } */ -/* { dg-final { scan-assembler-not {vmv2r} } } */ -/* { dg-final { scan-assembler-not {vmv4r} } } */ -/* { dg-final { scan-assembler-not {vmv8r} } } */ +/* { dg-final { scan-assembler-not {vmv2r} { xfail riscv*-*-* } } } */ +/* { dg-final { scan-assembler-not {vmv4r} { xfail riscv*-*-* } } } */ +/* { dg-final { scan-assembler-not {vmv8r} { xfail riscv*-*-* } } } */ /* { dg-final { scan-assembler-not {csrr} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-57.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-57.c deleted file mode 100644 index 5c91a7b5f83c..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-57.c +++ /dev/null @@ -1,62 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */ - -#include "riscv_vector.h" - -void -foo (void *in, void *out, int n, uint8_t x) -{ - for (int i = 0; i < n; i++) - { - asm volatile("nop" ::: "memory"); - vint16m4_t v0 = __riscv_vle16_v_i16m4 (in, 4);in+=100; - vint8m2_t v0_n = __riscv_vreinterpret_v_i16m2_i8m2 (__riscv_vget_v_i16m4_i16m2 (v0, 1)); - v0 = __riscv_vwmaccus_vx_i16m4_tu (v0, x, v0_n, 4); - asm volatile("nop" ::: "memory"); - vint16m4_t v1 = __riscv_vle16_v_i16m4 (in, 4);in+=100; - vint8m2_t v1_n = __riscv_vreinterpret_v_i16m2_i8m2 (__riscv_vget_v_i16m4_i16m2 (v1, 1)); - v1 = __riscv_vwmaccus_vx_i16m4_tu (v1, x, v1_n, 4); - asm volatile("nop" ::: "memory"); - vint16m4_t v2 = __riscv_vle16_v_i16m4 (in, 4);in+=100; - vint8m2_t v2_n = __riscv_vreinterpret_v_i16m2_i8m2 (__riscv_vget_v_i16m4_i16m2 (v2, 1)); - v2 = __riscv_vwmaccus_vx_i16m4_tu (v2, x, v2_n, 4); - asm volatile("nop" ::: "memory"); - vint16m4_t v3 = __riscv_vle16_v_i16m4 (in, 4);in+=100; - vint8m2_t v3_n = __riscv_vreinterpret_v_i16m2_i8m2 (__riscv_vget_v_i16m4_i16m2 (v3, 1)); - v3 = __riscv_vwmaccus_vx_i16m4_tu (v3, x, v3_n, 4); - asm volatile("nop" ::: "memory"); - vint16m4_t v4 = __riscv_vle16_v_i16m4 (in, 4);in+=100; - vint8m2_t v4_n = __riscv_vreinterpret_v_i16m2_i8m2 (__riscv_vget_v_i16m4_i16m2 (v4, 1)); - v4 = __riscv_vwmaccus_vx_i16m4_tu (v4, x, v4_n, 4); - asm volatile("nop" ::: "memory"); - vint16m4_t v5 = __riscv_vle16_v_i16m4 (in, 4);in+=100; - vint8m2_t v5_n = __riscv_vreinterpret_v_i16m2_i8m2 (__riscv_vget_v_i16m4_i16m2 (v5, 1)); - v5 = __riscv_vwmaccus_vx_i16m4_tu (v5, x, v5_n, 4); - asm volatile("nop" ::: "memory"); - vint16m4_t v6 = __riscv_vle16_v_i16m4 (in, 4);in+=100; - vint8m2_t v6_n = __riscv_vreinterpret_v_i16m2_i8m2 (__riscv_vget_v_i16m4_i16m2 (v6, 1)); - v6 = __riscv_vwmaccus_vx_i16m4_tu (v6, x, v6_n, 4); - asm volatile("nop" ::: "memory"); - vint8m2_t v7_n = __riscv_vle8_v_i8m2 (in, 4);in+=100; - vint16m4_t v7 = __riscv_vwcvt_x_x_v_i16m4 (v7_n, 4); - - asm volatile("nop" ::: "memory"); - __riscv_vsse16_v_i16m4 (out, 4, v0, 4);out+=100; - __riscv_vsse16_v_i16m4 (out, 4, v1, 4);out+=100; - __riscv_vsse16_v_i16m4 (out, 4, v2, 4);out+=100; - __riscv_vsse16_v_i16m4 (out, 4, v3, 4);out+=100; - __riscv_vsse16_v_i16m4 (out, 4, v4, 4);out+=100; - __riscv_vsse16_v_i16m4 (out, 4, v5, 4);out+=100; - __riscv_vsse16_v_i16m4 (out, 4, v6, 4);out+=100; - __riscv_vsse16_v_i16m4 (out, 4, v7, 4);out+=100; - } -} - -/* The narrowed signed source is the highest-numbered half of the signed - accumulator, thus it overlaps the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v4,[^,]+,v6([^0-9]|$)} 7 } } */ -/* { dg-final { scan-assembler-not {vmv1r} } } */ -/* { dg-final { scan-assembler-not {vmv2r} } } */ -/* { dg-final { scan-assembler-not {vmv4r} { xfail riscv*-*-* } } } */ -/* { dg-final { scan-assembler-not {vmv8r} } } */ -/* { dg-final { scan-assembler-not {csrr} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-58.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-58.c deleted file mode 100644 index a6da2bc40095..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-58.c +++ /dev/null @@ -1,62 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */ - -#include "riscv_vector.h" - -void -foo (void *in, void *out, int n, uint16_t x) -{ - for (int i = 0; i < n; i++) - { - asm volatile("nop" ::: "memory"); - vint32m4_t v0 = __riscv_vle32_v_i32m4 (in, 4);in+=100; - vint16m2_t v0_n = __riscv_vreinterpret_v_i32m2_i16m2 (__riscv_vget_v_i32m4_i32m2 (v0, 1)); - v0 = __riscv_vwmaccus_vx_i32m4_tu (v0, x, v0_n, 4); - asm volatile("nop" ::: "memory"); - vint32m4_t v1 = __riscv_vle32_v_i32m4 (in, 4);in+=100; - vint16m2_t v1_n = __riscv_vreinterpret_v_i32m2_i16m2 (__riscv_vget_v_i32m4_i32m2 (v1, 1)); - v1 = __riscv_vwmaccus_vx_i32m4_tu (v1, x, v1_n, 4); - asm volatile("nop" ::: "memory"); - vint32m4_t v2 = __riscv_vle32_v_i32m4 (in, 4);in+=100; - vint16m2_t v2_n = __riscv_vreinterpret_v_i32m2_i16m2 (__riscv_vget_v_i32m4_i32m2 (v2, 1)); - v2 = __riscv_vwmaccus_vx_i32m4_tu (v2, x, v2_n, 4); - asm volatile("nop" ::: "memory"); - vint32m4_t v3 = __riscv_vle32_v_i32m4 (in, 4);in+=100; - vint16m2_t v3_n = __riscv_vreinterpret_v_i32m2_i16m2 (__riscv_vget_v_i32m4_i32m2 (v3, 1)); - v3 = __riscv_vwmaccus_vx_i32m4_tu (v3, x, v3_n, 4); - asm volatile("nop" ::: "memory"); - vint32m4_t v4 = __riscv_vle32_v_i32m4 (in, 4);in+=100; - vint16m2_t v4_n = __riscv_vreinterpret_v_i32m2_i16m2 (__riscv_vget_v_i32m4_i32m2 (v4, 1)); - v4 = __riscv_vwmaccus_vx_i32m4_tu (v4, x, v4_n, 4); - asm volatile("nop" ::: "memory"); - vint32m4_t v5 = __riscv_vle32_v_i32m4 (in, 4);in+=100; - vint16m2_t v5_n = __riscv_vreinterpret_v_i32m2_i16m2 (__riscv_vget_v_i32m4_i32m2 (v5, 1)); - v5 = __riscv_vwmaccus_vx_i32m4_tu (v5, x, v5_n, 4); - asm volatile("nop" ::: "memory"); - vint32m4_t v6 = __riscv_vle32_v_i32m4 (in, 4);in+=100; - vint16m2_t v6_n = __riscv_vreinterpret_v_i32m2_i16m2 (__riscv_vget_v_i32m4_i32m2 (v6, 1)); - v6 = __riscv_vwmaccus_vx_i32m4_tu (v6, x, v6_n, 4); - asm volatile("nop" ::: "memory"); - vint16m2_t v7_n = __riscv_vle16_v_i16m2 (in, 4);in+=100; - vint32m4_t v7 = __riscv_vwcvt_x_x_v_i32m4 (v7_n, 4); - - asm volatile("nop" ::: "memory"); - __riscv_vsse32_v_i32m4 (out, 4, v0, 4);out+=100; - __riscv_vsse32_v_i32m4 (out, 4, v1, 4);out+=100; - __riscv_vsse32_v_i32m4 (out, 4, v2, 4);out+=100; - __riscv_vsse32_v_i32m4 (out, 4, v3, 4);out+=100; - __riscv_vsse32_v_i32m4 (out, 4, v4, 4);out+=100; - __riscv_vsse32_v_i32m4 (out, 4, v5, 4);out+=100; - __riscv_vsse32_v_i32m4 (out, 4, v6, 4);out+=100; - __riscv_vsse32_v_i32m4 (out, 4, v7, 4);out+=100; - } -} - -/* The narrowed signed source is the highest-numbered half of the signed - accumulator, thus it overlaps the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccus\.vx\s+v4,[^,]+,v6([^0-9]|$)} 7 } } */ -/* { dg-final { scan-assembler-not {vmv1r} } } */ -/* { dg-final { scan-assembler-not {vmv2r} } } */ -/* { dg-final { scan-assembler-not {vmv4r} { xfail riscv*-*-* } } } */ -/* { dg-final { scan-assembler-not {vmv8r} } } */ -/* { dg-final { scan-assembler-not {csrr} } } */
