https://gcc.gnu.org/g:f304860a0dc0c3c5b46afeea96ecf0af5ea17e0e
commit r17-5720-gf304860a0dc0c3c5b46afeea96ecf0af5ea17e0e Author: Pan Li <[email protected]> Date: Wed Oct 28 10:37:58 2026 +0800 RISC-V: Disable RVV register overlap for vwmacc[u].vx [PR target/128162] Revert the register overlap of the widening multiply-add insn vwmacc[u].vx and the related test cases. The insn reads the vd as the accumulator with EEW = 2 * SEW, while the vs1 and vs2 are read with EEW = SEW. The section 5.2 of the vector spec reserves any encoding in which one vector register supplies source operands with two or more different EEWs. Thus, the vs1 and vs2 must not overlap the vd register group, even in the highest-numbered part. For example, below asm dump is reserved as the v3 is read with both the EEW = 32 and the EEW = 16. vwmacc.vx v2,a0,v3 # LMUL = 1, SEW = 16 This reverts commit(s): c69c5e7b8e0 RISC-V: Allow RVV register overlap for vwmacc[u].vx c3b9dc79868 RISC-V: Add test cases for vwmacc.vx reg overlap 24b2b8ee6bb RISC-V: Add test cases for vwmaccu.vx reg overlap db174be8290 RISC-V: Add more test cases for vwmacc[u].vx PR target/128162 gcc/ChangeLog: * config/riscv/vector.md: Revert Wvr constraint to the early clobber vr. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i16-m1.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i16-m2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i16-m4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i16-mf2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i16-mf4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i32-m1.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i32-m2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i32-m4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i32-mf2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-m1.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-m2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-m4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-mf2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-mf4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-mf8.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u16-m1.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u16-m2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u16-m4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u16-mf2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u16-mf4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u32-m1.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u32-m2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u32-m4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u32-mf2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-m1.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-m2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-m4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-mf2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-mf4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-mf8.c: Removed. * gcc.target/riscv/rvv/base/pr112431-53.c: Removed. * gcc.target/riscv/rvv/base/pr112431-54.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h: Remove test helper macros. Signed-off-by: Pan Li <[email protected]> Diff: --- gcc/config/riscv/vector.md | 18 +- .../rvv/autovec/group_overlap/group_overlap.h | 199 --------------------- .../rvv/autovec/group_overlap/vwmacc_vx-i16-m1.c | 58 ------ .../rvv/autovec/group_overlap/vwmacc_vx-i16-m2.c | 50 ------ .../rvv/autovec/group_overlap/vwmacc_vx-i16-m4.c | 46 ----- .../rvv/autovec/group_overlap/vwmacc_vx-i16-mf2.c | 21 --- .../rvv/autovec/group_overlap/vwmacc_vx-i16-mf4.c | 21 --- .../rvv/autovec/group_overlap/vwmacc_vx-i32-m1.c | 58 ------ .../rvv/autovec/group_overlap/vwmacc_vx-i32-m2.c | 50 ------ .../rvv/autovec/group_overlap/vwmacc_vx-i32-m4.c | 46 ----- .../rvv/autovec/group_overlap/vwmacc_vx-i32-mf2.c | 21 --- .../rvv/autovec/group_overlap/vwmacc_vx-i8-m1.c | 58 ------ .../rvv/autovec/group_overlap/vwmacc_vx-i8-m2.c | 50 ------ .../rvv/autovec/group_overlap/vwmacc_vx-i8-m4.c | 46 ----- .../rvv/autovec/group_overlap/vwmacc_vx-i8-mf2.c | 21 --- .../rvv/autovec/group_overlap/vwmacc_vx-i8-mf4.c | 21 --- .../rvv/autovec/group_overlap/vwmacc_vx-i8-mf8.c | 21 --- .../rvv/autovec/group_overlap/vwmaccu_vx-u16-m1.c | 58 ------ .../rvv/autovec/group_overlap/vwmaccu_vx-u16-m2.c | 50 ------ .../rvv/autovec/group_overlap/vwmaccu_vx-u16-m4.c | 46 ----- .../rvv/autovec/group_overlap/vwmaccu_vx-u16-mf2.c | 21 --- .../rvv/autovec/group_overlap/vwmaccu_vx-u16-mf4.c | 21 --- .../rvv/autovec/group_overlap/vwmaccu_vx-u32-m1.c | 58 ------ .../rvv/autovec/group_overlap/vwmaccu_vx-u32-m2.c | 50 ------ .../rvv/autovec/group_overlap/vwmaccu_vx-u32-m4.c | 46 ----- .../rvv/autovec/group_overlap/vwmaccu_vx-u32-mf2.c | 21 --- .../rvv/autovec/group_overlap/vwmaccu_vx-u8-m1.c | 58 ------ .../rvv/autovec/group_overlap/vwmaccu_vx-u8-m2.c | 50 ------ .../rvv/autovec/group_overlap/vwmaccu_vx-u8-m4.c | 46 ----- .../rvv/autovec/group_overlap/vwmaccu_vx-u8-mf2.c | 21 --- .../rvv/autovec/group_overlap/vwmaccu_vx-u8-mf4.c | 21 --- .../rvv/autovec/group_overlap/vwmaccu_vx-u8-mf8.c | 21 --- .../gcc.target/riscv/rvv/base/pr112431-53.c | 62 ------- .../gcc.target/riscv/rvv/base/pr112431-54.c | 62 ------- 34 files changed, 9 insertions(+), 1508 deletions(-) diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md index 7f7c9e8ddf1b..330dbe54752e 100644 --- a/gcc/config/riscv/vector.md +++ b/gcc/config/riscv/vector.md @@ -6103,24 +6103,24 @@ (set_attr "mode" "<V_DOUBLE_TRUNC>")]) (define_insn "@pred_widen_mul_plus<su><mode>_scalar" - [(set (match_operand:VWEXTI 0 "register_operand" "=vr, vd") + [(set (match_operand:VWEXTI 0 "register_operand" "=&vr") (if_then_else:VWEXTI (unspec:<VM> - [(match_operand:<VM> 1 "vector_mask_operand" "Wc1, vm") - (match_operand 5 "vector_length_operand" "rvl,rvl") - (match_operand 6 "const_int_operand" " i, i") - (match_operand 7 "const_int_operand" " i, i") - (match_operand 8 "const_int_operand" " i, i") + [(match_operand:<VM> 1 "vector_mask_operand" "vmWc1") + (match_operand 5 "vector_length_operand" " rvl") + (match_operand 6 "const_int_operand" " i") + (match_operand 7 "const_int_operand" " i") + (match_operand 8 "const_int_operand" " i") (reg:SI VL_REGNUM) (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE) (plus:VWEXTI (mult:VWEXTI (any_extend:VWEXTI (vec_duplicate:<V_DOUBLE_TRUNC> - (match_operand:<VSUBEL> 3 "register_operand" " r, r"))) + (match_operand:<VSUBEL> 3 "register_operand" " r"))) (any_extend:VWEXTI - (match_operand:<V_DOUBLE_TRUNC> 4 "register_operand" "Wvr,Wvr"))) - (match_operand:VWEXTI 2 "register_operand" " 0, 0")) + (match_operand:<V_DOUBLE_TRUNC> 4 "register_operand" " vr"))) + (match_operand:VWEXTI 2 "register_operand" " 0")) (match_dup 2)))] "TARGET_VECTOR" "vwmacc<u>.vx\t%0,%3,%4%p1" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h index 825e12fe4daa..c947ede1aed5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h @@ -811,145 +811,6 @@ ST_F ((void *)out, vd14, VL); OUT += VL; \ ST_F ((void *)out, vd15, VL); OUT += VL; \ -#define LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X4(NT, WT, LD_NF, LD_WF, OUT_F, \ - ST_F, OUT, START, X, VL) \ - NT vs0 = LD_NF ((void *)START, VL); START += VL; \ - NT vs1 = LD_NF ((void *)START, VL); START += VL; \ - NT vs2 = LD_NF ((void *)START, VL); START += VL; \ - NT vs3 = LD_NF ((void *)START, VL); START += VL; \ - WT vw0 = LD_WF ((void *)START, VL); START += VL; \ - WT vw1 = LD_WF ((void *)START, VL); START += VL; \ - WT vw2 = LD_WF ((void *)START, VL); START += VL; \ - WT vw3 = LD_WF ((void *)START, VL); START += VL; \ - \ - asm volatile("nop" ::: "memory"); \ - \ - WT vd0 = OUT_F (vw0, X, vs0, VL); \ - WT vd1 = OUT_F (vw1, X, vs1, VL); \ - WT vd2 = OUT_F (vw2, X, vs2, VL); \ - WT vd3 = OUT_F (vw3, X, vs3, VL); \ - \ - asm volatile("nop" ::: "memory"); \ - \ - ST_F ((void *)out, vd0, VL); OUT += VL; \ - ST_F ((void *)out, vd1, VL); OUT += VL; \ - ST_F ((void *)out, vd2, VL); OUT += VL; \ - ST_F ((void *)out, vd3, VL); OUT += VL; \ - -#define LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X8(NT, WT, LD_NF, LD_WF, OUT_F, \ - ST_F, OUT, START, X, VL) \ - NT vs0 = LD_NF ((void *)START, VL); START += VL; \ - NT vs1 = LD_NF ((void *)START, VL); START += VL; \ - NT vs2 = LD_NF ((void *)START, VL); START += VL; \ - NT vs3 = LD_NF ((void *)START, VL); START += VL; \ - NT vs4 = LD_NF ((void *)START, VL); START += VL; \ - NT vs5 = LD_NF ((void *)START, VL); START += VL; \ - NT vs6 = LD_NF ((void *)START, VL); START += VL; \ - NT vs7 = LD_NF ((void *)START, VL); START += VL; \ - WT vw0 = LD_WF ((void *)START, VL); START += VL; \ - WT vw1 = LD_WF ((void *)START, VL); START += VL; \ - WT vw2 = LD_WF ((void *)START, VL); START += VL; \ - WT vw3 = LD_WF ((void *)START, VL); START += VL; \ - WT vw4 = LD_WF ((void *)START, VL); START += VL; \ - WT vw5 = LD_WF ((void *)START, VL); START += VL; \ - WT vw6 = LD_WF ((void *)START, VL); START += VL; \ - WT vw7 = LD_WF ((void *)START, VL); START += VL; \ - \ - asm volatile("nop" ::: "memory"); \ - \ - WT vd0 = OUT_F (vw0, X, vs0, VL); \ - WT vd1 = OUT_F (vw1, X, vs1, VL); \ - WT vd2 = OUT_F (vw2, X, vs2, VL); \ - WT vd3 = OUT_F (vw3, X, vs3, VL); \ - WT vd4 = OUT_F (vw4, X, vs4, VL); \ - WT vd5 = OUT_F (vw5, X, vs5, VL); \ - WT vd6 = OUT_F (vw6, X, vs6, VL); \ - WT vd7 = OUT_F (vw7, X, vs7, VL); \ - \ - asm volatile("nop" ::: "memory"); \ - \ - ST_F ((void *)out, vd0, VL); OUT += VL; \ - ST_F ((void *)out, vd1, VL); OUT += VL; \ - ST_F ((void *)out, vd2, VL); OUT += VL; \ - ST_F ((void *)out, vd3, VL); OUT += VL; \ - ST_F ((void *)out, vd4, VL); OUT += VL; \ - ST_F ((void *)out, vd5, VL); OUT += VL; \ - ST_F ((void *)out, vd6, VL); OUT += VL; \ - ST_F ((void *)out, vd7, VL); OUT += VL; \ - -#define LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16(NT, WT, LD_NF, LD_WF, OUT_F, \ - ST_F, OUT, START, X, VL) \ - NT vs0 = LD_NF ((void *)START, VL); START += VL; \ - NT vs1 = LD_NF ((void *)START, VL); START += VL; \ - NT vs2 = LD_NF ((void *)START, VL); START += VL; \ - NT vs3 = LD_NF ((void *)START, VL); START += VL; \ - NT vs4 = LD_NF ((void *)START, VL); START += VL; \ - NT vs5 = LD_NF ((void *)START, VL); START += VL; \ - NT vs6 = LD_NF ((void *)START, VL); START += VL; \ - NT vs7 = LD_NF ((void *)START, VL); START += VL; \ - NT vs8 = LD_NF ((void *)START, VL); START += VL; \ - NT vs9 = LD_NF ((void *)START, VL); START += VL; \ - NT vs10 = LD_NF ((void *)START, VL); START += VL; \ - NT vs11 = LD_NF ((void *)START, VL); START += VL; \ - NT vs12 = LD_NF ((void *)START, VL); START += VL; \ - NT vs13 = LD_NF ((void *)START, VL); START += VL; \ - NT vs14 = LD_NF ((void *)START, VL); START += VL; \ - NT vs15 = LD_NF ((void *)START, VL); START += VL; \ - WT vw0 = LD_WF ((void *)START, VL); START += VL; \ - WT vw1 = LD_WF ((void *)START, VL); START += VL; \ - WT vw2 = LD_WF ((void *)START, VL); START += VL; \ - WT vw3 = LD_WF ((void *)START, VL); START += VL; \ - WT vw4 = LD_WF ((void *)START, VL); START += VL; \ - WT vw5 = LD_WF ((void *)START, VL); START += VL; \ - WT vw6 = LD_WF ((void *)START, VL); START += VL; \ - WT vw7 = LD_WF ((void *)START, VL); START += VL; \ - WT vw8 = LD_WF ((void *)START, VL); START += VL; \ - WT vw9 = LD_WF ((void *)START, VL); START += VL; \ - WT vw10 = LD_WF ((void *)START, VL); START += VL; \ - WT vw11 = LD_WF ((void *)START, VL); START += VL; \ - WT vw12 = LD_WF ((void *)START, VL); START += VL; \ - WT vw13 = LD_WF ((void *)START, VL); START += VL; \ - WT vw14 = LD_WF ((void *)START, VL); START += VL; \ - WT vw15 = LD_WF ((void *)START, VL); START += VL; \ - \ - asm volatile("nop" ::: "memory"); \ - \ - WT vd0 = OUT_F (vw0, X, vs0, VL); \ - WT vd1 = OUT_F (vw1, X, vs1, VL); \ - WT vd2 = OUT_F (vw2, X, vs2, VL); \ - WT vd3 = OUT_F (vw3, X, vs3, VL); \ - WT vd4 = OUT_F (vw4, X, vs4, VL); \ - WT vd5 = OUT_F (vw5, X, vs5, VL); \ - WT vd6 = OUT_F (vw6, X, vs6, VL); \ - WT vd7 = OUT_F (vw7, X, vs7, VL); \ - WT vd8 = OUT_F (vw8, X, vs8, VL); \ - WT vd9 = OUT_F (vw9, X, vs9, VL); \ - WT vd10 = OUT_F (vw10, X, vs10, VL); \ - WT vd11 = OUT_F (vw11, X, vs11, VL); \ - WT vd12 = OUT_F (vw12, X, vs12, VL); \ - WT vd13 = OUT_F (vw13, X, vs13, VL); \ - WT vd14 = OUT_F (vw14, X, vs14, VL); \ - WT vd15 = OUT_F (vw15, X, vs15, VL); \ - \ - asm volatile("nop" ::: "memory"); \ - \ - ST_F ((void *)out, vd0, VL); OUT += VL; \ - ST_F ((void *)out, vd1, VL); OUT += VL; \ - ST_F ((void *)out, vd2, VL); OUT += VL; \ - ST_F ((void *)out, vd3, VL); OUT += VL; \ - ST_F ((void *)out, vd4, VL); OUT += VL; \ - ST_F ((void *)out, vd5, VL); OUT += VL; \ - ST_F ((void *)out, vd6, VL); OUT += VL; \ - ST_F ((void *)out, vd7, VL); OUT += VL; \ - ST_F ((void *)out, vd8, VL); OUT += VL; \ - ST_F ((void *)out, vd9, VL); OUT += VL; \ - ST_F ((void *)out, vd10, VL); OUT += VL; \ - ST_F ((void *)out, vd11, VL); OUT += VL; \ - ST_F ((void *)out, vd12, VL); OUT += VL; \ - ST_F ((void *)out, vd13, VL); OUT += VL; \ - ST_F ((void *)out, vd14, VL); OUT += VL; \ - ST_F ((void *)out, vd15, VL); OUT += VL; \ - #define LOOP_DUAL_WIDEN_TERNARY_BODY_SU_X4(NT, NUT, WT, LD_NF, \ LD_NUF, LD_WF, OUT_F, ST_F, \ OUT, START, VL) \ @@ -1152,33 +1013,6 @@ ST_F ((void *)out, vd0, VL); OUT += VL; \ ST_F ((void *)out, vd1, VL); OUT += VL; \ -/* Like LOOP_DUAL_WIDEN_TERNARY_BODY_OVERLAP_X2 but the multiplier comes from - a scalar register, thus the narrowed source is the only vector operand that - can overlap the destination register group. RI_F reinterprets the widened - accumulator as the narrowed element type and GET_F extracts the - highest-numbered half of it. */ -#define LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2(NT, WT, WNT, LD_WF, \ - RI_F, GET_F, OUT_F, \ - ST_F, OUT, START, X, VL) \ - WT vw0 = LD_WF ((void *)START, VL); START += VL; \ - WT vw1 = LD_WF ((void *)START, VL); START += VL; \ - \ - asm volatile("nop" ::: "memory"); \ - \ - WNT vr0 = RI_F (vw0); \ - WNT vr1 = RI_F (vw1); \ - \ - NT vs0 = GET_F (vr0, 1); \ - NT vs1 = GET_F (vr1, 1); \ - \ - WT vd0 = OUT_F (vw0, X, vs0, VL); \ - WT vd1 = OUT_F (vw1, X, vs1, VL); \ - \ - asm volatile("nop" ::: "memory"); \ - \ - ST_F ((void *)out, vd0, VL); OUT += VL; \ - ST_F ((void *)out, vd1, VL); OUT += VL; \ - /* Like LOOP_DUAL_WIDEN_TERNARY_BODY_OVERLAP_X2 but for the mixed signed and unsigned narrowed sources. The first insn overlaps the destination register group with the signed source, the second one with the unsigned source, thus @@ -1402,39 +1236,6 @@ } \ } -#define DEF_GROUP_OVERLAP_TERNARY_4(VL_F, NT, WT, ST, LD_NF, LD_WF, OUT_F, \ - ST_F, NAME, LOOP_BODY) \ - void test_group_overlap_##NAME##_##NT##_ternary_4(uint8_t *data, \ - uint8_t *out, \ - ST x, \ - size_t limit) \ - { \ - uint8_t *start = data; \ - uint8_t *end = data + limit; \ - size_t vl = VL_F (); \ - \ - while (start < end) { \ - LOOP_BODY (NT, WT, LD_NF, LD_WF, OUT_F, ST_F, out, start, x, vl); \ - } \ - } - -#define DEF_GROUP_OVERLAP_TERNARY_5(VL_F, NT, WT, WNT, ST, LD_WF, RI_F, \ - GET_F, OUT_F, ST_F, NAME, LOOP_BODY) \ - void test_group_overlap_##NAME##_##NT##_ternary_5(uint8_t *data, \ - uint8_t *out, \ - ST x, \ - size_t limit) \ - { \ - uint8_t *start = data; \ - uint8_t *end = data + limit; \ - size_t vl = VL_F (); \ - \ - while (start < end) { \ - LOOP_BODY (NT, WT, WNT, LD_WF, RI_F, GET_F, OUT_F, ST_F, out, start, \ - x, vl); \ - } \ - } - #define DEF_GROUP_OVERLAP_REDUCE_0(VL_F, NT, WT, WNT, LD_NF, RI_F, GET_F, \ IDX, OUT_F, ST_F, NAME, LOOP_BODY) \ void test_group_overlap_##NAME##_##NT##_reduce_0(uint8_t *data, \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i16-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i16-m1.c deleted file mode 100644 index 0bf156a496f7..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i16-m1.c +++ /dev/null @@ -1,58 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e16m1, - vint16m1_t, - vint32m2_t, - int16_t, - __riscv_vle16_v_i16m1, - __riscv_vle32_v_i32m2, - __riscv_vwmacc_vx_i32m2, - __riscv_vse32_v_i32m2, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e16m1, - vint16m1_t, - vint32m2_t, - vint16m2_t, - int16_t, - __riscv_vle32_v_i32m2, - __riscv_vreinterpret_v_i32m2_i16m2, - __riscv_vget_v_i16m2_i16m1, - __riscv_vwmacc_vx_i32m2, - __riscv_vse32_v_i32m2, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v6,s0,v27([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v4,s0,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v14,s0,v31([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v12,s0,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v2,s0,v25([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v26,s0,v24([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v10,s0,v29([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v30,s0,v23([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v24,s0,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v8,s0,v28([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v26,s0,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v16,s0,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v22,s0,v21([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v28,s0,v18([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v20,s0,v19([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v18,s0,v1([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v4,a2,v5([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v2,a2,v3([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i16-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i16-m2.c deleted file mode 100644 index e6660e7d55d5..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i16-m2.c +++ /dev/null @@ -1,50 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e16m2, - vint16m2_t, - vint32m4_t, - int16_t, - __riscv_vle16_v_i16m2, - __riscv_vle32_v_i32m4, - __riscv_vwmacc_vx_i32m4, - __riscv_vse32_v_i32m4, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X8) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e16m2, - vint16m2_t, - vint32m4_t, - vint16m4_t, - int16_t, - __riscv_vle32_v_i32m4, - __riscv_vreinterpret_v_i32m4_i16m4, - __riscv_vget_v_i16m4_i16m2, - __riscv_vwmacc_vx_i32m4, - __riscv_vse32_v_i32m4, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v12,a2,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v8,a2,v28([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v4,a2,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v16,a2,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v28,a2,v24([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v24,a2,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v28,a2,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v20,a2,v2([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v8,a2,v10([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v4,a2,v6([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i16-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i16-m4.c deleted file mode 100644 index 4689c74dc741..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i16-m4.c +++ /dev/null @@ -1,46 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e16m4, - vint16m4_t, - vint32m8_t, - int16_t, - __riscv_vle16_v_i16m4, - __riscv_vle32_v_i32m8, - __riscv_vwmacc_vx_i32m8, - __riscv_vse32_v_i32m8, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X4) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e16m4, - vint16m4_t, - vint32m8_t, - vint16m8_t, - int16_t, - __riscv_vle32_v_i32m8, - __riscv_vreinterpret_v_i32m8_i16m8, - __riscv_vget_v_i16m8_i16m4, - __riscv_vwmacc_vx_i32m8, - __riscv_vse32_v_i32m8, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v24,a2,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v16,a2,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v16,a2,v8([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v8,a2,v4([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v16,a2,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v8,a2,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i16-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i16-mf2.c deleted file mode 100644 index 23c643ac5424..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i16-mf2.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e16m1, - vint16mf2_t, - vint32m1_t, - int16_t, - __riscv_vle16_v_i16mf2, - __riscv_vle32_v_i32m1, - __riscv_vwmacc_vx_i32m1, - __riscv_vse32_v_i32m1, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap the source at all. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx} 16 } } */ -/* { dg-final { scan-assembler-not {vwmacc\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i16-mf4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i16-mf4.c deleted file mode 100644 index e0c3a2b17643..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i16-mf4.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e16m1, - vint16mf4_t, - vint32mf2_t, - int16_t, - __riscv_vle16_v_i16mf4, - __riscv_vle32_v_i32mf2, - __riscv_vwmacc_vx_i32mf2, - __riscv_vse32_v_i32mf2, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap the source at all. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx} 16 } } */ -/* { dg-final { scan-assembler-not {vwmacc\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i32-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i32-m1.c deleted file mode 100644 index 2cd7446a94c8..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i32-m1.c +++ /dev/null @@ -1,58 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e32m1, - vint32m1_t, - vint64m2_t, - int32_t, - __riscv_vle32_v_i32m1, - __riscv_vle64_v_i64m2, - __riscv_vwmacc_vx_i64m2, - __riscv_vse64_v_i64m2, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e32m1, - vint32m1_t, - vint64m2_t, - vint32m2_t, - int32_t, - __riscv_vle64_v_i64m2, - __riscv_vreinterpret_v_i64m2_i32m2, - __riscv_vget_v_i32m2_i32m1, - __riscv_vwmacc_vx_i64m2, - __riscv_vse64_v_i64m2, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v6,s0,v27([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v4,s0,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v14,s0,v31([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v12,s0,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v2,s0,v25([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v26,s0,v24([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v10,s0,v29([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v30,s0,v23([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v24,s0,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v8,s0,v28([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v26,s0,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v16,s0,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v22,s0,v21([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v28,s0,v18([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v20,s0,v19([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v18,s0,v1([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v4,a2,v5([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v2,a2,v3([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i32-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i32-m2.c deleted file mode 100644 index c867c67a4eaa..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i32-m2.c +++ /dev/null @@ -1,50 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e32m2, - vint32m2_t, - vint64m4_t, - int32_t, - __riscv_vle32_v_i32m2, - __riscv_vle64_v_i64m4, - __riscv_vwmacc_vx_i64m4, - __riscv_vse64_v_i64m4, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X8) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e32m2, - vint32m2_t, - vint64m4_t, - vint32m4_t, - int32_t, - __riscv_vle64_v_i64m4, - __riscv_vreinterpret_v_i64m4_i32m4, - __riscv_vget_v_i32m4_i32m2, - __riscv_vwmacc_vx_i64m4, - __riscv_vse64_v_i64m4, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v12,a2,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v8,a2,v28([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v4,a2,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v16,a2,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v28,a2,v24([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v24,a2,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v28,a2,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v20,a2,v2([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v8,a2,v10([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v4,a2,v6([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i32-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i32-m4.c deleted file mode 100644 index 96f0dcc66300..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i32-m4.c +++ /dev/null @@ -1,46 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e32m4, - vint32m4_t, - vint64m8_t, - int32_t, - __riscv_vle32_v_i32m4, - __riscv_vle64_v_i64m8, - __riscv_vwmacc_vx_i64m8, - __riscv_vse64_v_i64m8, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X4) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e32m4, - vint32m4_t, - vint64m8_t, - vint32m8_t, - int32_t, - __riscv_vle64_v_i64m8, - __riscv_vreinterpret_v_i64m8_i32m8, - __riscv_vget_v_i32m8_i32m4, - __riscv_vwmacc_vx_i64m8, - __riscv_vse64_v_i64m8, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v24,a2,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v16,a2,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v16,a2,v8([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v8,a2,v4([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v16,a2,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v8,a2,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i32-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i32-mf2.c deleted file mode 100644 index 3d28f4d35101..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i32-mf2.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e32m1, - vint32mf2_t, - vint64m1_t, - int32_t, - __riscv_vle32_v_i32mf2, - __riscv_vle64_v_i64m1, - __riscv_vwmacc_vx_i64m1, - __riscv_vse64_v_i64m1, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap the source at all. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx} 16 } } */ -/* { dg-final { scan-assembler-not {vwmacc\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-m1.c deleted file mode 100644 index d7007c46e9bd..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-m1.c +++ /dev/null @@ -1,58 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e8m1, - vint8m1_t, - vint16m2_t, - int8_t, - __riscv_vle8_v_i8m1, - __riscv_vle16_v_i16m2, - __riscv_vwmacc_vx_i16m2, - __riscv_vse16_v_i16m2, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e8m1, - vint8m1_t, - vint16m2_t, - vint8m2_t, - int8_t, - __riscv_vle16_v_i16m2, - __riscv_vreinterpret_v_i16m2_i8m2, - __riscv_vget_v_i8m2_i8m1, - __riscv_vwmacc_vx_i16m2, - __riscv_vse16_v_i16m2, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v6,s0,v27([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v4,s0,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v14,s0,v31([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v12,s0,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v2,s0,v25([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v26,s0,v24([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v10,s0,v29([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v30,s0,v23([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v24,s0,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v8,s0,v28([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v26,s0,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v16,s0,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v22,s0,v21([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v28,s0,v18([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v20,s0,v19([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v18,s0,v1([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v4,a2,v5([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v2,a2,v3([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-m2.c deleted file mode 100644 index 4507afe275d6..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-m2.c +++ /dev/null @@ -1,50 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e8m2, - vint8m2_t, - vint16m4_t, - int8_t, - __riscv_vle8_v_i8m2, - __riscv_vle16_v_i16m4, - __riscv_vwmacc_vx_i16m4, - __riscv_vse16_v_i16m4, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X8) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e8m2, - vint8m2_t, - vint16m4_t, - vint8m4_t, - int8_t, - __riscv_vle16_v_i16m4, - __riscv_vreinterpret_v_i16m4_i8m4, - __riscv_vget_v_i8m4_i8m2, - __riscv_vwmacc_vx_i16m4, - __riscv_vse16_v_i16m4, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v12,a2,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v8,a2,v28([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v4,a2,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v16,a2,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v28,a2,v24([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v24,a2,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v28,a2,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v20,a2,v2([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v8,a2,v10([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v4,a2,v6([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-m4.c deleted file mode 100644 index 265bd590d819..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-m4.c +++ /dev/null @@ -1,46 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e8m4, - vint8m4_t, - vint16m8_t, - int8_t, - __riscv_vle8_v_i8m4, - __riscv_vle16_v_i16m8, - __riscv_vwmacc_vx_i16m8, - __riscv_vse16_v_i16m8, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X4) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e8m4, - vint8m4_t, - vint16m8_t, - vint8m8_t, - int8_t, - __riscv_vle16_v_i16m8, - __riscv_vreinterpret_v_i16m8_i8m8, - __riscv_vget_v_i8m8_i8m4, - __riscv_vwmacc_vx_i16m8, - __riscv_vse16_v_i16m8, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v24,a2,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v16,a2,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v16,a2,v8([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v8,a2,v4([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v16,a2,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v8,a2,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-mf2.c deleted file mode 100644 index 9d5cbe9bc4b0..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-mf2.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e8m1, - vint8mf2_t, - vint16m1_t, - int8_t, - __riscv_vle8_v_i8mf2, - __riscv_vle16_v_i16m1, - __riscv_vwmacc_vx_i16m1, - __riscv_vse16_v_i16m1, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap the source at all. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx} 16 } } */ -/* { dg-final { scan-assembler-not {vwmacc\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-mf4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-mf4.c deleted file mode 100644 index be663f220e0b..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-mf4.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e8m1, - vint8mf4_t, - vint16mf2_t, - int8_t, - __riscv_vle8_v_i8mf4, - __riscv_vle16_v_i16mf2, - __riscv_vwmacc_vx_i16mf2, - __riscv_vse16_v_i16mf2, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap the source at all. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx} 16 } } */ -/* { dg-final { scan-assembler-not {vwmacc\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-mf8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-mf8.c deleted file mode 100644 index 65f9f275dbeb..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vx-i8-mf8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e8m1, - vint8mf8_t, - vint16mf4_t, - int8_t, - __riscv_vle8_v_i8mf8, - __riscv_vle16_v_i16mf4, - __riscv_vwmacc_vx_i16mf4, - __riscv_vse16_v_i16mf4, - vwmacc_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap the source at all. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx} 16 } } */ -/* { dg-final { scan-assembler-not {vwmacc\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u16-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u16-m1.c deleted file mode 100644 index 3336bc855c3c..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u16-m1.c +++ /dev/null @@ -1,58 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e16m1, - vuint16m1_t, - vuint32m2_t, - uint16_t, - __riscv_vle16_v_u16m1, - __riscv_vle32_v_u32m2, - __riscv_vwmaccu_vx_u32m2, - __riscv_vse32_v_u32m2, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e16m1, - vuint16m1_t, - vuint32m2_t, - vuint16m2_t, - uint16_t, - __riscv_vle32_v_u32m2, - __riscv_vreinterpret_v_u32m2_u16m2, - __riscv_vget_v_u16m2_u16m1, - __riscv_vwmaccu_vx_u32m2, - __riscv_vse32_v_u32m2, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v6,s0,v27([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v4,s0,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v14,s0,v31([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v12,s0,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v2,s0,v25([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v26,s0,v24([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v10,s0,v29([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v30,s0,v23([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v24,s0,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v8,s0,v28([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v26,s0,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v16,s0,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v22,s0,v21([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v28,s0,v18([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v20,s0,v19([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v18,s0,v1([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v4,a2,v5([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v2,a2,v3([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u16-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u16-m2.c deleted file mode 100644 index cc4177225691..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u16-m2.c +++ /dev/null @@ -1,50 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e16m2, - vuint16m2_t, - vuint32m4_t, - uint16_t, - __riscv_vle16_v_u16m2, - __riscv_vle32_v_u32m4, - __riscv_vwmaccu_vx_u32m4, - __riscv_vse32_v_u32m4, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X8) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e16m2, - vuint16m2_t, - vuint32m4_t, - vuint16m4_t, - uint16_t, - __riscv_vle32_v_u32m4, - __riscv_vreinterpret_v_u32m4_u16m4, - __riscv_vget_v_u16m4_u16m2, - __riscv_vwmaccu_vx_u32m4, - __riscv_vse32_v_u32m4, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v12,a2,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v8,a2,v28([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v4,a2,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v16,a2,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v28,a2,v24([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v24,a2,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v28,a2,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v20,a2,v2([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v8,a2,v10([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v4,a2,v6([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u16-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u16-m4.c deleted file mode 100644 index feaf66e83fa1..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u16-m4.c +++ /dev/null @@ -1,46 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e16m4, - vuint16m4_t, - vuint32m8_t, - uint16_t, - __riscv_vle16_v_u16m4, - __riscv_vle32_v_u32m8, - __riscv_vwmaccu_vx_u32m8, - __riscv_vse32_v_u32m8, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X4) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e16m4, - vuint16m4_t, - vuint32m8_t, - vuint16m8_t, - uint16_t, - __riscv_vle32_v_u32m8, - __riscv_vreinterpret_v_u32m8_u16m8, - __riscv_vget_v_u16m8_u16m4, - __riscv_vwmaccu_vx_u32m8, - __riscv_vse32_v_u32m8, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v24,a2,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v16,a2,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v16,a2,v8([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v8,a2,v4([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v16,a2,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v8,a2,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u16-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u16-mf2.c deleted file mode 100644 index 582d5ecab1cc..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u16-mf2.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e16m1, - vuint16mf2_t, - vuint32m1_t, - uint16_t, - __riscv_vle16_v_u16mf2, - __riscv_vle32_v_u32m1, - __riscv_vwmaccu_vx_u32m1, - __riscv_vse32_v_u32m1, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap the source at all. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx} 16 } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u16-mf4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u16-mf4.c deleted file mode 100644 index 8fe1ecb728a2..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u16-mf4.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e16m1, - vuint16mf4_t, - vuint32mf2_t, - uint16_t, - __riscv_vle16_v_u16mf4, - __riscv_vle32_v_u32mf2, - __riscv_vwmaccu_vx_u32mf2, - __riscv_vse32_v_u32mf2, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap the source at all. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx} 16 } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u32-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u32-m1.c deleted file mode 100644 index 985bcfd2fb88..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u32-m1.c +++ /dev/null @@ -1,58 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e32m1, - vuint32m1_t, - vuint64m2_t, - uint32_t, - __riscv_vle32_v_u32m1, - __riscv_vle64_v_u64m2, - __riscv_vwmaccu_vx_u64m2, - __riscv_vse64_v_u64m2, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e32m1, - vuint32m1_t, - vuint64m2_t, - vuint32m2_t, - uint32_t, - __riscv_vle64_v_u64m2, - __riscv_vreinterpret_v_u64m2_u32m2, - __riscv_vget_v_u32m2_u32m1, - __riscv_vwmaccu_vx_u64m2, - __riscv_vse64_v_u64m2, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v6,s0,v27([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v4,s0,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v14,s0,v31([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v12,s0,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v2,s0,v25([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v26,s0,v24([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v10,s0,v29([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v30,s0,v23([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v24,s0,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v8,s0,v28([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v26,s0,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v16,s0,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v22,s0,v21([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v28,s0,v18([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v20,s0,v19([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v18,s0,v1([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v4,a2,v5([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v2,a2,v3([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u32-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u32-m2.c deleted file mode 100644 index d10f2a3d4ebb..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u32-m2.c +++ /dev/null @@ -1,50 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e32m2, - vuint32m2_t, - vuint64m4_t, - uint32_t, - __riscv_vle32_v_u32m2, - __riscv_vle64_v_u64m4, - __riscv_vwmaccu_vx_u64m4, - __riscv_vse64_v_u64m4, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X8) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e32m2, - vuint32m2_t, - vuint64m4_t, - vuint32m4_t, - uint32_t, - __riscv_vle64_v_u64m4, - __riscv_vreinterpret_v_u64m4_u32m4, - __riscv_vget_v_u32m4_u32m2, - __riscv_vwmaccu_vx_u64m4, - __riscv_vse64_v_u64m4, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v12,a2,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v8,a2,v28([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v4,a2,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v16,a2,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v28,a2,v24([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v24,a2,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v28,a2,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v20,a2,v2([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v8,a2,v10([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v4,a2,v6([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u32-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u32-m4.c deleted file mode 100644 index f5962ca7e537..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u32-m4.c +++ /dev/null @@ -1,46 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e32m4, - vuint32m4_t, - vuint64m8_t, - uint32_t, - __riscv_vle32_v_u32m4, - __riscv_vle64_v_u64m8, - __riscv_vwmaccu_vx_u64m8, - __riscv_vse64_v_u64m8, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X4) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e32m4, - vuint32m4_t, - vuint64m8_t, - vuint32m8_t, - uint32_t, - __riscv_vle64_v_u64m8, - __riscv_vreinterpret_v_u64m8_u32m8, - __riscv_vget_v_u32m8_u32m4, - __riscv_vwmaccu_vx_u64m8, - __riscv_vse64_v_u64m8, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v24,a2,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v16,a2,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v16,a2,v8([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v8,a2,v4([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v16,a2,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v8,a2,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u32-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u32-mf2.c deleted file mode 100644 index 5d5e84e0a2f2..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u32-mf2.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e32m1, - vuint32mf2_t, - vuint64m1_t, - uint32_t, - __riscv_vle32_v_u32mf2, - __riscv_vle64_v_u64m1, - __riscv_vwmaccu_vx_u64m1, - __riscv_vse64_v_u64m1, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap the source at all. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx} 16 } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-m1.c deleted file mode 100644 index 5e60f4338d3e..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-m1.c +++ /dev/null @@ -1,58 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e8m1, - vuint8m1_t, - vuint16m2_t, - uint8_t, - __riscv_vle8_v_u8m1, - __riscv_vle16_v_u16m2, - __riscv_vwmaccu_vx_u16m2, - __riscv_vse16_v_u16m2, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e8m1, - vuint8m1_t, - vuint16m2_t, - vuint8m2_t, - uint8_t, - __riscv_vle16_v_u16m2, - __riscv_vreinterpret_v_u16m2_u8m2, - __riscv_vget_v_u8m2_u8m1, - __riscv_vwmaccu_vx_u16m2, - __riscv_vse16_v_u16m2, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v6,s0,v27([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v4,s0,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v14,s0,v31([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v12,s0,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v2,s0,v25([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v26,s0,v24([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v10,s0,v29([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v30,s0,v23([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v24,s0,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v8,s0,v28([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v26,s0,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v16,s0,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v22,s0,v21([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v28,s0,v18([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v20,s0,v19([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v18,s0,v1([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v4,a2,v5([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v2,a2,v3([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-m2.c deleted file mode 100644 index be5d8f9e0940..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-m2.c +++ /dev/null @@ -1,50 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e8m2, - vuint8m2_t, - vuint16m4_t, - uint8_t, - __riscv_vle8_v_u8m2, - __riscv_vle16_v_u16m4, - __riscv_vwmaccu_vx_u16m4, - __riscv_vse16_v_u16m4, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X8) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e8m2, - vuint8m2_t, - vuint16m4_t, - vuint8m4_t, - uint8_t, - __riscv_vle16_v_u16m4, - __riscv_vreinterpret_v_u16m4_u8m4, - __riscv_vget_v_u8m4_u8m2, - __riscv_vwmaccu_vx_u16m4, - __riscv_vse16_v_u16m4, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v12,a2,v30([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v8,a2,v28([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v4,a2,v26([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v16,a2,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v28,a2,v24([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v24,a2,v22([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v28,a2,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v20,a2,v2([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v8,a2,v10([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v4,a2,v6([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-m4.c deleted file mode 100644 index 00c64ce4393f..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-m4.c +++ /dev/null @@ -1,46 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e8m4, - vuint8m4_t, - vuint16m8_t, - uint8_t, - __riscv_vle8_v_u8m4, - __riscv_vle16_v_u16m8, - __riscv_vwmaccu_vx_u16m8, - __riscv_vse16_v_u16m8, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X4) - -DEF_GROUP_OVERLAP_TERNARY_5( - __riscv_vsetvlmax_e8m4, - vuint8m4_t, - vuint16m8_t, - vuint8m8_t, - uint8_t, - __riscv_vle16_v_u16m8, - __riscv_vreinterpret_v_u16m8_u8m8, - __riscv_vget_v_u8m8_u8m4, - __riscv_vwmaccu_vx_u16m8, - __riscv_vse16_v_u16m8, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_OVERLAP_X2) - -/* ternary_4: the accumulator occupies the whole destination register group and - is live when the narrowed source is read, so the source cannot be allocated - inside the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v24,a2,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v16,a2,v0([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v16,a2,v8([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v8,a2,v4([^0-9]|$)} 1 } } */ - -/* ternary_5: the narrowed source is the highest-numbered half of its own - accumulator, thus it overlaps the highest-numbered part of the destination - register group. Without the group overlap the source would have to be - copied out to a disjoint register group first. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v16,a2,v20([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v8,a2,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-mf2.c deleted file mode 100644 index a93fa9864301..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-mf2.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e8m1, - vuint8mf2_t, - vuint16m1_t, - uint8_t, - __riscv_vle8_v_u8mf2, - __riscv_vle16_v_u16m1, - __riscv_vwmaccu_vx_u16m1, - __riscv_vse16_v_u16m1, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap the source at all. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx} 16 } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-mf4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-mf4.c deleted file mode 100644 index 398b525e82d2..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-mf4.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e8m1, - vuint8mf4_t, - vuint16mf2_t, - uint8_t, - __riscv_vle8_v_u8mf4, - __riscv_vle16_v_u16mf2, - __riscv_vwmaccu_vx_u16mf2, - __riscv_vse16_v_u16mf2, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap the source at all. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx} 16 } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-mf8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-mf8.c deleted file mode 100644 index 1eee6d40fab8..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx-u8-mf8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ - -#include "group_overlap.h" - -DEF_GROUP_OVERLAP_TERNARY_4( - __riscv_vsetvlmax_e8m1, - vuint8mf8_t, - vuint16mf4_t, - uint8_t, - __riscv_vle8_v_u8mf8, - __riscv_vle16_v_u16mf4, - __riscv_vwmaccu_vx_u16mf4, - __riscv_vse16_v_u16mf4, - vwmaccu_vx, - LOOP_DUAL_WIDEN_TERNARY_VX_BODY_X16) - -/* The fractional LMUL source has EMUL < 1, thus the widened destination - register group must not overlap the source at all. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx} 16 } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-53.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-53.c deleted file mode 100644 index a4c9ae10a5c2..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-53.c +++ /dev/null @@ -1,62 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */ - -#include "riscv_vector.h" - -void -foo (void *in, void *out, int n, int8_t x) -{ - for (int i = 0; i < n; i++) - { - asm volatile("nop" ::: "memory"); - vint16m4_t v0 = __riscv_vle16_v_i16m4 (in, 4);in+=100; - vint8m2_t v0_n = __riscv_vreinterpret_v_i16m2_i8m2 (__riscv_vget_v_i16m4_i16m2 (v0, 1)); - v0 = __riscv_vwmacc_vx_i16m4_tu (v0, x, v0_n, 4); - asm volatile("nop" ::: "memory"); - vint16m4_t v1 = __riscv_vle16_v_i16m4 (in, 4);in+=100; - vint8m2_t v1_n = __riscv_vreinterpret_v_i16m2_i8m2 (__riscv_vget_v_i16m4_i16m2 (v1, 1)); - v1 = __riscv_vwmacc_vx_i16m4_tu (v1, x, v1_n, 4); - asm volatile("nop" ::: "memory"); - vint16m4_t v2 = __riscv_vle16_v_i16m4 (in, 4);in+=100; - vint8m2_t v2_n = __riscv_vreinterpret_v_i16m2_i8m2 (__riscv_vget_v_i16m4_i16m2 (v2, 1)); - v2 = __riscv_vwmacc_vx_i16m4_tu (v2, x, v2_n, 4); - asm volatile("nop" ::: "memory"); - vint16m4_t v3 = __riscv_vle16_v_i16m4 (in, 4);in+=100; - vint8m2_t v3_n = __riscv_vreinterpret_v_i16m2_i8m2 (__riscv_vget_v_i16m4_i16m2 (v3, 1)); - v3 = __riscv_vwmacc_vx_i16m4_tu (v3, x, v3_n, 4); - asm volatile("nop" ::: "memory"); - vint16m4_t v4 = __riscv_vle16_v_i16m4 (in, 4);in+=100; - vint8m2_t v4_n = __riscv_vreinterpret_v_i16m2_i8m2 (__riscv_vget_v_i16m4_i16m2 (v4, 1)); - v4 = __riscv_vwmacc_vx_i16m4_tu (v4, x, v4_n, 4); - asm volatile("nop" ::: "memory"); - vint16m4_t v5 = __riscv_vle16_v_i16m4 (in, 4);in+=100; - vint8m2_t v5_n = __riscv_vreinterpret_v_i16m2_i8m2 (__riscv_vget_v_i16m4_i16m2 (v5, 1)); - v5 = __riscv_vwmacc_vx_i16m4_tu (v5, x, v5_n, 4); - asm volatile("nop" ::: "memory"); - vint16m4_t v6 = __riscv_vle16_v_i16m4 (in, 4);in+=100; - vint8m2_t v6_n = __riscv_vreinterpret_v_i16m2_i8m2 (__riscv_vget_v_i16m4_i16m2 (v6, 1)); - v6 = __riscv_vwmacc_vx_i16m4_tu (v6, x, v6_n, 4); - asm volatile("nop" ::: "memory"); - vint8m2_t v7_n = __riscv_vle8_v_i8m2 (in, 4);in+=100; - vint16m4_t v7 = __riscv_vwcvt_x_x_v_i16m4 (v7_n, 4); - - asm volatile("nop" ::: "memory"); - __riscv_vsse16_v_i16m4 (out, 4, v0, 4);out+=100; - __riscv_vsse16_v_i16m4 (out, 4, v1, 4);out+=100; - __riscv_vsse16_v_i16m4 (out, 4, v2, 4);out+=100; - __riscv_vsse16_v_i16m4 (out, 4, v3, 4);out+=100; - __riscv_vsse16_v_i16m4 (out, 4, v4, 4);out+=100; - __riscv_vsse16_v_i16m4 (out, 4, v5, 4);out+=100; - __riscv_vsse16_v_i16m4 (out, 4, v6, 4);out+=100; - __riscv_vsse16_v_i16m4 (out, 4, v7, 4);out+=100; - } -} - -/* The narrowed source is the highest-numbered half of the accumulator, thus it - overlaps the destination register group. */ -/* { dg-final { scan-assembler-times {vwmacc\.vx\s+v4,[^,]+,v6([^0-9]|$)} 7 } } */ -/* { dg-final { scan-assembler-not {vmv1r} } } */ -/* { dg-final { scan-assembler-not {vmv2r} } } */ -/* { dg-final { scan-assembler-not {vmv4r} { xfail riscv*-*-* } } } */ -/* { dg-final { scan-assembler-not {vmv8r} } } */ -/* { dg-final { scan-assembler-not {csrr} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-54.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-54.c deleted file mode 100644 index 11a44c3a61d2..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-54.c +++ /dev/null @@ -1,62 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */ - -#include "riscv_vector.h" - -void -foo (void *in, void *out, int n, uint8_t x) -{ - for (int i = 0; i < n; i++) - { - asm volatile("nop" ::: "memory"); - vuint16m4_t v0 = __riscv_vle16_v_u16m4 (in, 4);in+=100; - vuint8m2_t v0_n = __riscv_vreinterpret_v_u16m2_u8m2 (__riscv_vget_v_u16m4_u16m2 (v0, 1)); - v0 = __riscv_vwmaccu_vx_u16m4_tu (v0, x, v0_n, 4); - asm volatile("nop" ::: "memory"); - vuint16m4_t v1 = __riscv_vle16_v_u16m4 (in, 4);in+=100; - vuint8m2_t v1_n = __riscv_vreinterpret_v_u16m2_u8m2 (__riscv_vget_v_u16m4_u16m2 (v1, 1)); - v1 = __riscv_vwmaccu_vx_u16m4_tu (v1, x, v1_n, 4); - asm volatile("nop" ::: "memory"); - vuint16m4_t v2 = __riscv_vle16_v_u16m4 (in, 4);in+=100; - vuint8m2_t v2_n = __riscv_vreinterpret_v_u16m2_u8m2 (__riscv_vget_v_u16m4_u16m2 (v2, 1)); - v2 = __riscv_vwmaccu_vx_u16m4_tu (v2, x, v2_n, 4); - asm volatile("nop" ::: "memory"); - vuint16m4_t v3 = __riscv_vle16_v_u16m4 (in, 4);in+=100; - vuint8m2_t v3_n = __riscv_vreinterpret_v_u16m2_u8m2 (__riscv_vget_v_u16m4_u16m2 (v3, 1)); - v3 = __riscv_vwmaccu_vx_u16m4_tu (v3, x, v3_n, 4); - asm volatile("nop" ::: "memory"); - vuint16m4_t v4 = __riscv_vle16_v_u16m4 (in, 4);in+=100; - vuint8m2_t v4_n = __riscv_vreinterpret_v_u16m2_u8m2 (__riscv_vget_v_u16m4_u16m2 (v4, 1)); - v4 = __riscv_vwmaccu_vx_u16m4_tu (v4, x, v4_n, 4); - asm volatile("nop" ::: "memory"); - vuint16m4_t v5 = __riscv_vle16_v_u16m4 (in, 4);in+=100; - vuint8m2_t v5_n = __riscv_vreinterpret_v_u16m2_u8m2 (__riscv_vget_v_u16m4_u16m2 (v5, 1)); - v5 = __riscv_vwmaccu_vx_u16m4_tu (v5, x, v5_n, 4); - asm volatile("nop" ::: "memory"); - vuint16m4_t v6 = __riscv_vle16_v_u16m4 (in, 4);in+=100; - vuint8m2_t v6_n = __riscv_vreinterpret_v_u16m2_u8m2 (__riscv_vget_v_u16m4_u16m2 (v6, 1)); - v6 = __riscv_vwmaccu_vx_u16m4_tu (v6, x, v6_n, 4); - asm volatile("nop" ::: "memory"); - vuint8m2_t v7_n = __riscv_vle8_v_u8m2 (in, 4);in+=100; - vuint16m4_t v7 = __riscv_vwcvtu_x_x_v_u16m4 (v7_n, 4); - - asm volatile("nop" ::: "memory"); - __riscv_vsse16_v_u16m4 (out, 4, v0, 4);out+=100; - __riscv_vsse16_v_u16m4 (out, 4, v1, 4);out+=100; - __riscv_vsse16_v_u16m4 (out, 4, v2, 4);out+=100; - __riscv_vsse16_v_u16m4 (out, 4, v3, 4);out+=100; - __riscv_vsse16_v_u16m4 (out, 4, v4, 4);out+=100; - __riscv_vsse16_v_u16m4 (out, 4, v5, 4);out+=100; - __riscv_vsse16_v_u16m4 (out, 4, v6, 4);out+=100; - __riscv_vsse16_v_u16m4 (out, 4, v7, 4);out+=100; - } -} - -/* The narrowed source is the highest-numbered half of the accumulator, thus it - overlaps the destination register group. */ -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v4,[^,]+,v6([^0-9]|$)} 7 } } */ -/* { dg-final { scan-assembler-not {vmv1r} } } */ -/* { dg-final { scan-assembler-not {vmv2r} } } */ -/* { dg-final { scan-assembler-not {vmv4r} { xfail riscv*-*-* } } } */ -/* { dg-final { scan-assembler-not {vmv8r} } } */ -/* { dg-final { scan-assembler-not {csrr} } } */
