https://gcc.gnu.org/g:a8f38d8ca0185580d7c0944809e16e6ba5d0e8c8
commit r17-5717-ga8f38d8ca0185580d7c0944809e16e6ba5d0e8c8 Author: Pan Li <[email protected]> Date: Wed Oct 28 10:36:44 2026 +0800 RISC-V: Disable RVV register overlap for vwmaccu.vx undef [PR target/128162] Revert the register overlap of the widening multiply-add insn vwmaccu.vx undef and the related test cases. The insn reads the vd as the accumulator with EEW = 2 * SEW, while the vs1 and vs2 are read with EEW = SEW. The section 5.2 of the vector spec reserves any encoding in which one vector register supplies source operands with two or more different EEWs. Thus, the vs1 and vs2 must not overlap the vd register group, even in the highest-numbered part. For example, below asm dump is reserved as the v3 is read with both the EEW = 32 and the EEW = 16. vwmaccu.vx v2,a0,v3 # LMUL = 1, SEW = 16 This reverts commit(s): 63fa52f94b8 RISC-V: Allow RVV register overlap for vwmaccu.vx undef a87ea5b3cfc RISC-V: Add test cases for vwmaccu.vx undef reg overlap 71fe685aaad RISC-V: Add more test cases for vwmaccu.vx undef PR target/128162 gcc/ChangeLog: * config/riscv/vector.md: Revert Wvr constraint to the early clobber vr. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u16-m1.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u16-m2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u16-m4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u16-mf2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u16-mf4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u32-m1.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u32-m2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u32-m4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u32-mf2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-m1.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-m2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-m4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-mf2.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-mf4.c: Removed. * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-mf8.c: Removed. * gcc.target/riscv/rvv/base/pr112431-59.c: Removed. Signed-off-by: Pan Li <[email protected]> Diff: --- gcc/config/riscv/vector.md | 18 +++---- .../group_overlap/vwmaccu_vx_undef-u16-m1.c | 21 -------- .../group_overlap/vwmaccu_vx_undef-u16-m2.c | 23 --------- .../group_overlap/vwmaccu_vx_undef-u16-m4.c | 26 ---------- .../group_overlap/vwmaccu_vx_undef-u16-mf2.c | 19 ------- .../group_overlap/vwmaccu_vx_undef-u16-mf4.c | 19 ------- .../group_overlap/vwmaccu_vx_undef-u32-m1.c | 21 -------- .../group_overlap/vwmaccu_vx_undef-u32-m2.c | 21 -------- .../group_overlap/vwmaccu_vx_undef-u32-m4.c | 23 --------- .../group_overlap/vwmaccu_vx_undef-u32-mf2.c | 19 ------- .../autovec/group_overlap/vwmaccu_vx_undef-u8-m1.c | 23 --------- .../autovec/group_overlap/vwmaccu_vx_undef-u8-m2.c | 26 ---------- .../autovec/group_overlap/vwmaccu_vx_undef-u8-m4.c | 29 ----------- .../group_overlap/vwmaccu_vx_undef-u8-mf2.c | 19 ------- .../group_overlap/vwmaccu_vx_undef-u8-mf4.c | 19 ------- .../group_overlap/vwmaccu_vx_undef-u8-mf8.c | 19 ------- .../gcc.target/riscv/rvv/base/pr112431-59.c | 60 ---------------------- 17 files changed, 9 insertions(+), 396 deletions(-) diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md index e0b08bd5a88e..aa886aabeeab 100644 --- a/gcc/config/riscv/vector.md +++ b/gcc/config/riscv/vector.md @@ -9213,24 +9213,24 @@ }) (define_insn "*pred_widen_mul_plus_u_vx<mode>_undef" - [(set (match_operand:VWEXTI 0 "register_operand" "=vr, vd") + [(set (match_operand:VWEXTI 0 "register_operand" "=&vr") (if_then_else:VWEXTI (unspec:<VM> - [(match_operand:<VM> 1 "vector_mask_operand" "Wc1, vm") - (match_operand 6 "vector_length_operand" "rvl,rvl") - (match_operand 7 "const_int_operand" " i, i") - (match_operand 8 "const_int_operand" " i, i") - (match_operand 9 "const_int_operand" " i, i") + [(match_operand:<VM> 1 "vector_mask_operand" "vmWc1") + (match_operand 6 "vector_length_operand" " rvl") + (match_operand 7 "const_int_operand" " i") + (match_operand 8 "const_int_operand" " i") + (match_operand 9 "const_int_operand" " i") (reg:SI VL_REGNUM) (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE) (plus:VWEXTI (mult:VWEXTI (zero_extend:VWEXTI (vec_duplicate:<V_DOUBLE_TRUNC> - (match_operand:<VSUBEL> 3 "register_operand" " rJ, rJ"))) + (match_operand:<VSUBEL> 3 "register_operand" " rJ"))) (zero_extend:VWEXTI - (match_operand:<V_DOUBLE_TRUNC> 4 "register_operand" "Wvr,Wvr"))) - (match_operand:VWEXTI 5 "register_operand" " 0, 0")) + (match_operand:<V_DOUBLE_TRUNC> 4 "register_operand" " vr"))) + (match_operand:VWEXTI 5 "register_operand" " 0")) (match_operand:VWEXTI 2 "vector_undef_operand")))] "TARGET_VECTOR" "vwmaccu.vx\t%0,%z3,%4%p1" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u16-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u16-m1.c deleted file mode 100644 index 7c33fa79b8ba..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u16-m1.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl" } */ - -typedef unsigned int u32x8_t __attribute__ ((vector_size (32))); -typedef unsigned int u32x4_t __attribute__ ((vector_size (16))); -typedef unsigned short u16x8_t __attribute__ ((vector_size (16))); - -u32x8_t -test_group_overlap_vwmaccu_vx_undef_u16 (u32x8_t acc, unsigned int x) -{ - u32x4_t hi = __builtin_shufflevector (acc, acc, 4, 5, 6, 7); - u16x8_t narrow = (u16x8_t) hi; - u32x8_t widen = __builtin_convertvector (narrow, u32x8_t); - unsigned int nx = x & 0xffff; - u32x8_t vx = { nx, nx, nx, nx, nx, nx, nx, nx }; - - return acc + widen * vx; -} - -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v2,a2,v3([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u16-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u16-m2.c deleted file mode 100644 index b7c6a4e56132..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u16-m2.c +++ /dev/null @@ -1,23 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl" } */ - -typedef unsigned int u32x16_t __attribute__ ((vector_size (64))); -typedef unsigned int u32x8_t __attribute__ ((vector_size (32))); -typedef unsigned short u16x16_t __attribute__ ((vector_size (32))); - -u32x16_t -test_group_overlap_vwmaccu_vx_undef_u16 (u32x16_t acc, unsigned int x) -{ - u32x8_t hi = __builtin_shufflevector (acc, acc, 8, 9, 10, 11, 12, 13, 14, 15); - u16x16_t narrow = (u16x16_t) hi; - u32x16_t widen = __builtin_convertvector (narrow, u32x16_t); - unsigned int nx = x & 0xffff; - u32x16_t vx = { - nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx - }; - - return acc + widen * vx; -} - -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v4,a2,v6([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u16-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u16-m4.c deleted file mode 100644 index 4bb61dc2fdf7..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u16-m4.c +++ /dev/null @@ -1,26 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl" } */ - -typedef unsigned int u32x32_t __attribute__ ((vector_size (128))); -typedef unsigned int u32x16_t __attribute__ ((vector_size (64))); -typedef unsigned short u16x32_t __attribute__ ((vector_size (64))); - -u32x32_t -test_group_overlap_vwmaccu_vx_undef_u16 (u32x32_t acc, unsigned int x) -{ - u32x16_t hi = __builtin_shufflevector ( - acc, acc, - 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31); - u16x32_t narrow = (u16x32_t) hi; - u32x32_t widen = __builtin_convertvector (narrow, u32x32_t); - unsigned int nx = x & 0xffff; - u32x32_t vx = { - nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, - nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx - }; - - return acc + widen * vx; -} - -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v8,a2,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u16-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u16-mf2.c deleted file mode 100644 index ef80ef7fa4d6..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u16-mf2.c +++ /dev/null @@ -1,19 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl" } */ - -typedef unsigned int u32x4_t __attribute__ ((vector_size (16))); -typedef unsigned short u16x4_t __attribute__ ((vector_size (8))); - -u32x4_t -test_group_overlap_vwmaccu_vx_undef_u16 (u32x4_t acc, u16x4_t narrow, - unsigned int x) -{ - u32x4_t widen = __builtin_convertvector (narrow, u32x4_t); - unsigned int nx = x & 0xffff; - u32x4_t vx = { nx, nx, nx, nx }; - - return acc + widen * vx; -} - -/* { dg-final { scan-assembler-times {vwmaccu\.vx} 1 } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u16-mf4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u16-mf4.c deleted file mode 100644 index 08588d06215b..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u16-mf4.c +++ /dev/null @@ -1,19 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl" } */ - -typedef unsigned int u32x2_t __attribute__ ((vector_size (8))); -typedef unsigned short u16x2_t __attribute__ ((vector_size (4))); - -u32x2_t -test_group_overlap_vwmaccu_vx_undef_u16 (u32x2_t acc, u16x2_t narrow, - unsigned int x) -{ - u32x2_t widen = __builtin_convertvector (narrow, u32x2_t); - unsigned int nx = x & 0xffff; - u32x2_t vx = { nx, nx }; - - return acc + widen * vx; -} - -/* { dg-final { scan-assembler-times {vwmaccu\.vx} 1 } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u32-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u32-m1.c deleted file mode 100644 index af57bacc9a33..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u32-m1.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl" } */ - -typedef unsigned long long u64x4_t __attribute__ ((vector_size (32))); -typedef unsigned long long u64x2_t __attribute__ ((vector_size (16))); -typedef unsigned int u32x4_t __attribute__ ((vector_size (16))); - -u64x4_t -test_group_overlap_vwmaccu_vx_undef_u32 (u64x4_t acc, unsigned long long x) -{ - u64x2_t hi = __builtin_shufflevector (acc, acc, 2, 3); - u32x4_t narrow = (u32x4_t) hi; - u64x4_t widen = __builtin_convertvector (narrow, u64x4_t); - unsigned long long nx = x & 0xffffffff; - u64x4_t vx = { nx, nx, nx, nx }; - - return acc + widen * vx; -} - -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v2,a2,v3([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u32-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u32-m2.c deleted file mode 100644 index 3b106acad064..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u32-m2.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl" } */ - -typedef unsigned long long u64x8_t __attribute__ ((vector_size (64))); -typedef unsigned long long u64x4_t __attribute__ ((vector_size (32))); -typedef unsigned int u32x8_t __attribute__ ((vector_size (32))); - -u64x8_t -test_group_overlap_vwmaccu_vx_undef_u32 (u64x8_t acc, unsigned long long x) -{ - u64x4_t hi = __builtin_shufflevector (acc, acc, 4, 5, 6, 7); - u32x8_t narrow = (u32x8_t) hi; - u64x8_t widen = __builtin_convertvector (narrow, u64x8_t); - unsigned long long nx = x & 0xffffffff; - u64x8_t vx = { nx, nx, nx, nx, nx, nx, nx, nx }; - - return acc + widen * vx; -} - -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v4,a2,v6([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u32-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u32-m4.c deleted file mode 100644 index d3080a16aef5..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u32-m4.c +++ /dev/null @@ -1,23 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl" } */ - -typedef unsigned long long u64x16_t __attribute__ ((vector_size (128))); -typedef unsigned long long u64x8_t __attribute__ ((vector_size (64))); -typedef unsigned int u32x16_t __attribute__ ((vector_size (64))); - -u64x16_t -test_group_overlap_vwmaccu_vx_undef_u32 (u64x16_t acc, unsigned long long x) -{ - u64x8_t hi = __builtin_shufflevector (acc, acc, 8, 9, 10, 11, 12, 13, 14, 15); - u32x16_t narrow = (u32x16_t) hi; - u64x16_t widen = __builtin_convertvector (narrow, u64x16_t); - unsigned long long nx = x & 0xffffffff; - u64x16_t vx = { - nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx - }; - - return acc + widen * vx; -} - -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v8,a2,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u32-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u32-mf2.c deleted file mode 100644 index c41bff3e4e36..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u32-mf2.c +++ /dev/null @@ -1,19 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl" } */ - -typedef unsigned long long u64x2_t __attribute__ ((vector_size (16))); -typedef unsigned int u32x2_t __attribute__ ((vector_size (8))); - -u64x2_t -test_group_overlap_vwmaccu_vx_undef_u32 (u64x2_t acc, u32x2_t narrow, - unsigned long long x) -{ - u64x2_t widen = __builtin_convertvector (narrow, u64x2_t); - unsigned long long nx = x & 0xffffffff; - u64x2_t vx = { nx, nx }; - - return acc + widen * vx; -} - -/* { dg-final { scan-assembler-times {vwmaccu\.vx} 1 } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-m1.c deleted file mode 100644 index 799eefd7e6cc..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-m1.c +++ /dev/null @@ -1,23 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl" } */ - -typedef unsigned short u16x16_t __attribute__ ((vector_size (32))); -typedef unsigned short u16x8_t __attribute__ ((vector_size (16))); -typedef unsigned char u8x16_t __attribute__ ((vector_size (16))); - -u16x16_t -test_group_overlap_vwmaccu_vx_undef_u8 (u16x16_t acc, unsigned short x) -{ - u16x8_t hi = __builtin_shufflevector (acc, acc, 8, 9, 10, 11, 12, 13, 14, 15); - u8x16_t narrow = (u8x16_t) hi; - u16x16_t widen = __builtin_convertvector (narrow, u16x16_t); - unsigned short nx = x & 0xff; - u16x16_t vx = { - nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx - }; - - return acc + widen * vx; -} - -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v2,a2,v3([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-m2.c deleted file mode 100644 index 094c680c6f9f..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-m2.c +++ /dev/null @@ -1,26 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl" } */ - -typedef unsigned short u16x32_t __attribute__ ((vector_size (64))); -typedef unsigned short u16x16_t __attribute__ ((vector_size (32))); -typedef unsigned char u8x32_t __attribute__ ((vector_size (32))); - -u16x32_t -test_group_overlap_vwmaccu_vx_undef_u8 (u16x32_t acc, unsigned short x) -{ - u16x16_t hi = __builtin_shufflevector ( - acc, acc, - 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31); - u8x32_t narrow = (u8x32_t) hi; - u16x32_t widen = __builtin_convertvector (narrow, u16x32_t); - unsigned short nx = x & 0xff; - u16x32_t vx = { - nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, - nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx - }; - - return acc + widen * vx; -} - -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v4,a2,v6([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-m4.c deleted file mode 100644 index 9fc3c20f5978..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-m4.c +++ /dev/null @@ -1,29 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl" } */ - -typedef unsigned short u16x64_t __attribute__ ((vector_size (128))); -typedef unsigned short u16x32_t __attribute__ ((vector_size (64))); -typedef unsigned char u8x64_t __attribute__ ((vector_size (64))); - -u16x64_t -test_group_overlap_vwmaccu_vx_undef_u8 (u16x64_t acc, unsigned short x) -{ - u16x32_t hi = __builtin_shufflevector ( - acc, acc, - 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, - 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63); - u8x64_t narrow = (u8x64_t) hi; - u16x64_t widen = __builtin_convertvector (narrow, u16x64_t); - unsigned short nx = x & 0xff; - u16x64_t vx = { - nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, - nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, - nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, - nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx, nx - }; - - return acc + widen * vx; -} - -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v8,a2,v12([^0-9]|$)} 1 } } */ -/* { dg-final { scan-assembler-not {vmv[0-9]+r\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-mf2.c deleted file mode 100644 index c78fc378b2c0..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-mf2.c +++ /dev/null @@ -1,19 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl" } */ - -typedef unsigned short u16x8_t __attribute__ ((vector_size (16))); -typedef unsigned char u8x8_t __attribute__ ((vector_size (8))); - -u16x8_t -test_group_overlap_vwmaccu_vx_undef_u8 (u16x8_t acc, u8x8_t narrow, - unsigned short x) -{ - u16x8_t widen = __builtin_convertvector (narrow, u16x8_t); - unsigned short nx = x & 0xff; - u16x8_t vx = { nx, nx, nx, nx, nx, nx, nx, nx }; - - return acc + widen * vx; -} - -/* { dg-final { scan-assembler-times {vwmaccu\.vx} 1 } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-mf4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-mf4.c deleted file mode 100644 index e8f15f87950e..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-mf4.c +++ /dev/null @@ -1,19 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl" } */ - -typedef unsigned short u16x4_t __attribute__ ((vector_size (8))); -typedef unsigned char u8x4_t __attribute__ ((vector_size (4))); - -u16x4_t -test_group_overlap_vwmaccu_vx_undef_u8 (u16x4_t acc, u8x4_t narrow, - unsigned short x) -{ - u16x4_t widen = __builtin_convertvector (narrow, u16x4_t); - unsigned short nx = x & 0xff; - u16x4_t vx = { nx, nx, nx, nx }; - - return acc + widen * vx; -} - -/* { dg-final { scan-assembler-times {vwmaccu\.vx} 1 } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-mf8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-mf8.c deleted file mode 100644 index 1cacf5236f67..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vx_undef-u8-mf8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl" } */ - -typedef unsigned short u16x2_t __attribute__ ((vector_size (4))); -typedef unsigned char u8x2_t __attribute__ ((vector_size (2))); - -u16x2_t -test_group_overlap_vwmaccu_vx_undef_u8 (u16x2_t acc, u8x2_t narrow, - unsigned short x) -{ - u16x2_t widen = __builtin_convertvector (narrow, u16x2_t); - unsigned short nx = x & 0xff; - u16x2_t vx = { nx, nx }; - - return acc + widen * vx; -} - -/* { dg-final { scan-assembler-times {vwmaccu\.vx} 1 } } */ -/* { dg-final { scan-assembler-not {vwmaccu\.vx\s+(v[0-9]+),[a-z0-9]+,\1([^0-9]|$)} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-59.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-59.c deleted file mode 100644 index 410b00c70043..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-59.c +++ /dev/null @@ -1,60 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */ - -#include "riscv_vector.h" - -void -foo (void *in, void *out, int n, uint16_t x) -{ - for (int i = 0; i < n; i++) - { - asm volatile("nop" ::: "memory"); - vuint32m4_t v0 = __riscv_vle32_v_u32m4 (in, 4);in+=100; - vuint16m2_t v0_n = __riscv_vreinterpret_v_u32m2_u16m2 (__riscv_vget_v_u32m4_u32m2 (v0, 1)); - v0 = __riscv_vwmaccu_vx_u32m4_tu (v0, x, v0_n, 4); - asm volatile("nop" ::: "memory"); - vuint32m4_t v1 = __riscv_vle32_v_u32m4 (in, 4);in+=100; - vuint16m2_t v1_n = __riscv_vreinterpret_v_u32m2_u16m2 (__riscv_vget_v_u32m4_u32m2 (v1, 1)); - v1 = __riscv_vwmaccu_vx_u32m4_tu (v1, x, v1_n, 4); - asm volatile("nop" ::: "memory"); - vuint32m4_t v2 = __riscv_vle32_v_u32m4 (in, 4);in+=100; - vuint16m2_t v2_n = __riscv_vreinterpret_v_u32m2_u16m2 (__riscv_vget_v_u32m4_u32m2 (v2, 1)); - v2 = __riscv_vwmaccu_vx_u32m4_tu (v2, x, v2_n, 4); - asm volatile("nop" ::: "memory"); - vuint32m4_t v3 = __riscv_vle32_v_u32m4 (in, 4);in+=100; - vuint16m2_t v3_n = __riscv_vreinterpret_v_u32m2_u16m2 (__riscv_vget_v_u32m4_u32m2 (v3, 1)); - v3 = __riscv_vwmaccu_vx_u32m4_tu (v3, x, v3_n, 4); - asm volatile("nop" ::: "memory"); - vuint32m4_t v4 = __riscv_vle32_v_u32m4 (in, 4);in+=100; - vuint16m2_t v4_n = __riscv_vreinterpret_v_u32m2_u16m2 (__riscv_vget_v_u32m4_u32m2 (v4, 1)); - v4 = __riscv_vwmaccu_vx_u32m4_tu (v4, x, v4_n, 4); - asm volatile("nop" ::: "memory"); - vuint32m4_t v5 = __riscv_vle32_v_u32m4 (in, 4);in+=100; - vuint16m2_t v5_n = __riscv_vreinterpret_v_u32m2_u16m2 (__riscv_vget_v_u32m4_u32m2 (v5, 1)); - v5 = __riscv_vwmaccu_vx_u32m4_tu (v5, x, v5_n, 4); - asm volatile("nop" ::: "memory"); - vuint32m4_t v6 = __riscv_vle32_v_u32m4 (in, 4);in+=100; - vuint16m2_t v6_n = __riscv_vreinterpret_v_u32m2_u16m2 (__riscv_vget_v_u32m4_u32m2 (v6, 1)); - v6 = __riscv_vwmaccu_vx_u32m4_tu (v6, x, v6_n, 4); - asm volatile("nop" ::: "memory"); - vuint16m2_t v7_n = __riscv_vle16_v_u16m2 (in, 4);in+=100; - vuint32m4_t v7 = __riscv_vwcvtu_x_x_v_u32m4 (v7_n, 4); - - asm volatile("nop" ::: "memory"); - __riscv_vsse32_v_u32m4 (out, 4, v0, 4);out+=100; - __riscv_vsse32_v_u32m4 (out, 4, v1, 4);out+=100; - __riscv_vsse32_v_u32m4 (out, 4, v2, 4);out+=100; - __riscv_vsse32_v_u32m4 (out, 4, v3, 4);out+=100; - __riscv_vsse32_v_u32m4 (out, 4, v4, 4);out+=100; - __riscv_vsse32_v_u32m4 (out, 4, v5, 4);out+=100; - __riscv_vsse32_v_u32m4 (out, 4, v6, 4);out+=100; - __riscv_vsse32_v_u32m4 (out, 4, v7, 4);out+=100; - } -} - -/* { dg-final { scan-assembler-times {vwmaccu\.vx\s+v4,[^,]+,v6([^0-9]|$)} 7 } } */ -/* { dg-final { scan-assembler-not {vmv1r} } } */ -/* { dg-final { scan-assembler-not {vmv2r} } } */ -/* { dg-final { scan-assembler-not {vmv4r} { xfail riscv*-*-* } } } */ -/* { dg-final { scan-assembler-not {vmv8r} } } */ -/* { dg-final { scan-assembler-not {csrr} } } */
