Hi Steve,
Can you please add a testcase? The patch looks fine.
I cannot approve it though.
Mike, can you please approve this patch?
Regards,
Surya
On 18/05/26 3:08 AM, Steve Markgraf wrote:
> The MPC8xx PowerQUICC family only implements full 'sync', 'lwsync'
> is not yet supported, same situation as for E500 cores.
>
> Fix emitting 'lwsync' instructions by adding PROCESSOR_MPCCORE
> to the TARGET_NO_LWSYNC define.
>
> Encountered an illegal instruction crash (in libstdc++ atomics) and
> verified the fix on actual MPC860 hardware.
>
> Minimal test:
>
> $ cat test.c
> #include <stdatomic.h>
> atomic_int counter;
> void store_release(int val) {
> atomic_store_explicit(&counter, val, memory_order_release);
> }
>
> $ powerpc-linux-gnu-gcc -mcpu=860 -msoft-float -O2 -S -o- test.c | grep sync
> lwsync <-- should be sync
>
> $ powerpc-linux-gnu-gcc -mcpu=8540 -msoft-float -O2 -S -o- test.c | grep
> sync
> sync <-- correct (TARGET_NO_LWSYNC already covers E500/8540)
>
> gcc/ChangeLog:
>
> * config/rs6000/rs6000.h (TARGET_NO_LWSYNC): Add
> PROCESSOR_MPCCORE.
> ---
> gcc/config/rs6000/rs6000.h | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
> index 2d3016db5..a6ce0560f 100644
> --- a/gcc/config/rs6000/rs6000.h
> +++ b/gcc/config/rs6000/rs6000.h
> @@ -533,9 +533,10 @@ extern int rs6000_vector_align[];
> || TARGET_VSX \
> || TARGET_HARD_FLOAT)
>
> -/* E500 cores only support plain "sync", not lwsync. */
> +/* E500 and MPC8xx cores only support plain "sync", not lwsync. */
> #define TARGET_NO_LWSYNC (rs6000_cpu == PROCESSOR_PPC8540 \
> - || rs6000_cpu == PROCESSOR_PPC8548)
> + || rs6000_cpu == PROCESSOR_PPC8548 \
> + || rs6000_cpu == PROCESSOR_MPCCORE)
>
>
> /* Which machine supports the various reciprocal estimate instructions. */
