From: Pan Li <[email protected]>

Like v[sz]ext.vf8, we continue the support for vwcvt[u].x.x.v.

Pan Li (4):
  RISC-V: Allow RVV register overlap for vwcvt[u].x.x.v
  RISC-V: Add test cases for vwcvt.x.x.v reg overlap
  RISC-V: Add test cases for vwcvtu.x.x.v reg overlap
  RISC-V: Adjust test case due to allow vwcvt[u].x.x.v overlap

 gcc/config/riscv/vector.md                    | 16 +++++-----
 .../rvv/autovec/group_overlap/vwcvt-i16-m1.c  | 17 ++++++++++
 .../rvv/autovec/group_overlap/vwcvt-i16-m2.c  | 17 ++++++++++
 .../rvv/autovec/group_overlap/vwcvt-i16-m4.c  | 17 ++++++++++
 .../rvv/autovec/group_overlap/vwcvt-i16-mf2.c | 31 +++++++++++++++++++
 .../rvv/autovec/group_overlap/vwcvt-i16-mf4.c | 31 +++++++++++++++++++
 .../rvv/autovec/group_overlap/vwcvt-i32-m1.c  | 17 ++++++++++
 .../rvv/autovec/group_overlap/vwcvt-i32-m2.c  | 17 ++++++++++
 .../rvv/autovec/group_overlap/vwcvt-i32-m4.c  | 17 ++++++++++
 .../rvv/autovec/group_overlap/vwcvt-i32-mf2.c | 31 +++++++++++++++++++
 .../rvv/autovec/group_overlap/vwcvt-i8-m1.c   | 17 ++++++++++
 .../rvv/autovec/group_overlap/vwcvt-i8-m2.c   | 17 ++++++++++
 .../rvv/autovec/group_overlap/vwcvt-i8-m4.c   | 17 ++++++++++
 .../rvv/autovec/group_overlap/vwcvt-i8-mf2.c  | 31 +++++++++++++++++++
 .../rvv/autovec/group_overlap/vwcvt-i8-mf4.c  | 31 +++++++++++++++++++
 .../rvv/autovec/group_overlap/vwcvt-i8-mf8.c  | 31 +++++++++++++++++++
 .../rvv/autovec/group_overlap/vwcvtu-i16-m1.c | 17 ++++++++++
 .../rvv/autovec/group_overlap/vwcvtu-i16-m2.c | 17 ++++++++++
 .../rvv/autovec/group_overlap/vwcvtu-i16-m4.c | 17 ++++++++++
 .../autovec/group_overlap/vwcvtu-i16-mf2.c    | 31 +++++++++++++++++++
 .../autovec/group_overlap/vwcvtu-i16-mf4.c    | 31 +++++++++++++++++++
 .../rvv/autovec/group_overlap/vwcvtu-i32-m1.c | 17 ++++++++++
 .../rvv/autovec/group_overlap/vwcvtu-i32-m2.c | 17 ++++++++++
 .../rvv/autovec/group_overlap/vwcvtu-i32-m4.c | 17 ++++++++++
 .../autovec/group_overlap/vwcvtu-i32-mf2.c    | 31 +++++++++++++++++++
 .../rvv/autovec/group_overlap/vwcvtu-i8-m1.c  | 17 ++++++++++
 .../rvv/autovec/group_overlap/vwcvtu-i8-m2.c  | 17 ++++++++++
 .../rvv/autovec/group_overlap/vwcvtu-i8-m4.c  | 17 ++++++++++
 .../rvv/autovec/group_overlap/vwcvtu-i8-mf2.c | 31 +++++++++++++++++++
 .../rvv/autovec/group_overlap/vwcvtu-i8-mf4.c | 31 +++++++++++++++++++
 .../rvv/autovec/group_overlap/vwcvtu-i8-mf8.c | 31 +++++++++++++++++++
 .../gcc.target/riscv/rvv/base/pr112431-1.c    |  2 +-
 .../gcc.target/riscv/rvv/base/pr112431-2.c    |  2 +-
 .../gcc.target/riscv/rvv/base/pr112431-3.c    |  2 +-
 .../gcc.target/riscv/rvv/base/pr112431-39.c   |  2 +-
 .../gcc.target/riscv/rvv/base/pr112431-40.c   |  2 +-
 .../gcc.target/riscv/rvv/base/pr112431-41.c   |  2 +-
 37 files changed, 692 insertions(+), 14 deletions(-)
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-mf2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-mf4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i32-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i32-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i32-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i32-mf2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-mf2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-mf4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-mf8.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvtu-i16-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvtu-i16-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvtu-i16-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvtu-i16-mf2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvtu-i16-mf4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvtu-i32-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvtu-i32-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvtu-i32-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvtu-i32-mf2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvtu-i8-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvtu-i8-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvtu-i8-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvtu-i8-mf2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvtu-i8-mf4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvtu-i8-mf8.c

-- 
2.43.0

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