[PATCH v1 4/4] RISC-V: Adjust test case due to allow vwcvt[u].x.x.v overlap

[pan2 . li]

From: Pan Li <pan2...@intel.com>

Remove the xfail due to vwcvt changes.

gcc/testsuite/ChangeLog:

        * gcc.target/riscv/rvv/base/pr112431-1.c: Remove xfail.
        * gcc.target/riscv/rvv/base/pr112431-2.c: Ditto.
        * gcc.target/riscv/rvv/base/pr112431-3.c: Ditto.
        * gcc.target/riscv/rvv/base/pr112431-39.c: Ditto.
        * gcc.target/riscv/rvv/base/pr112431-40.c: Ditto.
        * gcc.target/riscv/rvv/base/pr112431-41.c: Ditto.

Signed-off-by: Pan Li <pan2...@intel.com>
---
 gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-1.c  | 2 +-
 gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-2.c  | 2 +-
 gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-3.c  | 2 +-
 gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-39.c | 2 +-
 gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-40.c | 2 +-
 gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-41.c | 2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-1.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-1.c
index 6f9c6f7bd8c..6b9a7c448f0 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-1.c
@@ -101,4 +101,4 @@ foo (char const *buf, size_t len)
 /* { dg-final { scan-assembler-not {vmv2r} } } */
 /* { dg-final { scan-assembler-not {vmv4r} } } */
 /* { dg-final { scan-assembler-not {vmv8r} } } */
-/* { dg-final { scan-assembler-not {csrr} { xfail riscv*-*-* } } } */
+/* { dg-final { scan-assembler-not {csrr} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-2.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-2.c
index b99dd19e623..da92d59406f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-2.c
@@ -65,4 +65,4 @@ foo (char const *buf, size_t len)
 /* { dg-final { scan-assembler-not {vmv2r} } } */
 /* { dg-final { scan-assembler-not {vmv4r} } } */
 /* { dg-final { scan-assembler-not {vmv8r} } } */
-/* { dg-final { scan-assembler-not {csrr} { xfail riscv*-*-* } } } */
+/* { dg-final { scan-assembler-not {csrr} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-3.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-3.c
index cac50bd003c..46f93a9049b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-3.c
@@ -48,4 +48,4 @@ foo (char const *buf, size_t len)
 /* { dg-final { scan-assembler-not {vmv2r} } } */
 /* { dg-final { scan-assembler-not {vmv4r} } } */
 /* { dg-final { scan-assembler-not {vmv8r} } } */
-/* { dg-final { scan-assembler-not {csrr} { xfail riscv*-*-* } } } */
+/* { dg-final { scan-assembler-not {csrr} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-39.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-39.c
index 1234718bb35..770b5411666 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-39.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-39.c
@@ -155,4 +155,4 @@ foo2 (void *in, void *out, int n)
 /* { dg-final { scan-assembler-not {vmv2r} { xfail riscv*-*-* } } } */
 /* { dg-final { scan-assembler-not {vmv4r} } } */
 /* { dg-final { scan-assembler-not {vmv8r} } } */
-/* { dg-final { scan-assembler-not {csrr} { xfail riscv*-*-* } } } */
+/* { dg-final { scan-assembler-not {csrr} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-40.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-40.c
index 5d6577cfe6e..f044a504fc8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-40.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-40.c
@@ -91,4 +91,4 @@ foo2 (void *in, void *out, int n)
 /* { dg-final { scan-assembler-not {vmv2r} } } */
 /* { dg-final { scan-assembler-not {vmv4r} { xfail riscv*-*-* } } } */
 /* { dg-final { scan-assembler-not {vmv8r} } } */
-/* { dg-final { scan-assembler-not {csrr} { xfail riscv*-*-* } } } */
+/* { dg-final { scan-assembler-not {csrr} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-41.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-41.c
index c31144c05b5..6bdcac82ea8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-41.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-41.c
@@ -59,4 +59,4 @@ foo2 (void *in, void *out, int n)
 /* { dg-final { scan-assembler-not {vmv2r} } } */
 /* { dg-final { scan-assembler-not {vmv4r} } } */
 /* { dg-final { scan-assembler-not {vmv8r} { xfail riscv*-*-* } } } */
-/* { dg-final { scan-assembler-not {csrr} { xfail riscv*-*-* } } } */
+/* { dg-final { scan-assembler-not {csrr} } } */
-- 
2.43.0