From: Pan Li <[email protected]>

Like v[sz]ext.vf8, we continue the support for vfwcvt.f.x[u].v.

Pan Li (4):
  RISC-V: Allow RVV register overlap for vfwcvt.f.x[u]
  RISC-V: Add test cases for vfwcvt.f.x.v reg overlap
  RISC-V: Adjust test case due to allow vwcvt.f.xu.v overlap
  RISC-V: Adjust test case due to allow vwcvt.f.x[u].v overlap

 gcc/config/riscv/vector.md                    | 16 +++++-----
 .../autovec/group_overlap/vfwcvt_f_x-i16-m1.c | 17 ++++++++++
 .../autovec/group_overlap/vfwcvt_f_x-i16-m2.c | 17 ++++++++++
 .../autovec/group_overlap/vfwcvt_f_x-i16-m4.c | 17 ++++++++++
 .../group_overlap/vfwcvt_f_x-i16-mf2.c        | 31 +++++++++++++++++++
 .../group_overlap/vfwcvt_f_x-i16-mf4.c        | 31 +++++++++++++++++++
 .../autovec/group_overlap/vfwcvt_f_x-i32-m1.c | 17 ++++++++++
 .../autovec/group_overlap/vfwcvt_f_x-i32-m2.c | 17 ++++++++++
 .../autovec/group_overlap/vfwcvt_f_x-i32-m4.c | 17 ++++++++++
 .../group_overlap/vfwcvt_f_x-i32-mf2.c        | 31 +++++++++++++++++++
 .../autovec/group_overlap/vfwcvt_f_x-i8-m1.c  | 17 ++++++++++
 .../autovec/group_overlap/vfwcvt_f_x-i8-m2.c  | 17 ++++++++++
 .../autovec/group_overlap/vfwcvt_f_x-i8-m4.c  | 17 ++++++++++
 .../autovec/group_overlap/vfwcvt_f_x-i8-mf2.c | 31 +++++++++++++++++++
 .../autovec/group_overlap/vfwcvt_f_x-i8-mf4.c | 31 +++++++++++++++++++
 .../autovec/group_overlap/vfwcvt_f_x-i8-mf8.c | 31 +++++++++++++++++++
 .../group_overlap/vfwcvt_f_xu-u16-m1.c        | 17 ++++++++++
 .../group_overlap/vfwcvt_f_xu-u16-m2.c        | 17 ++++++++++
 .../group_overlap/vfwcvt_f_xu-u16-m4.c        | 17 ++++++++++
 .../group_overlap/vfwcvt_f_xu-u16-mf2.c       | 31 +++++++++++++++++++
 .../group_overlap/vfwcvt_f_xu-u16-mf4.c       | 31 +++++++++++++++++++
 .../group_overlap/vfwcvt_f_xu-u32-m1.c        | 17 ++++++++++
 .../group_overlap/vfwcvt_f_xu-u32-m2.c        | 17 ++++++++++
 .../group_overlap/vfwcvt_f_xu-u32-m4.c        | 17 ++++++++++
 .../group_overlap/vfwcvt_f_xu-u32-mf2.c       | 31 +++++++++++++++++++
 .../autovec/group_overlap/vfwcvt_f_xu-u8-m1.c | 17 ++++++++++
 .../autovec/group_overlap/vfwcvt_f_xu-u8-m2.c | 17 ++++++++++
 .../autovec/group_overlap/vfwcvt_f_xu-u8-m4.c | 17 ++++++++++
 .../group_overlap/vfwcvt_f_xu-u8-mf2.c        | 31 +++++++++++++++++++
 .../group_overlap/vfwcvt_f_xu-u8-mf4.c        | 31 +++++++++++++++++++
 .../group_overlap/vfwcvt_f_xu-u8-mf8.c        | 31 +++++++++++++++++++
 .../gcc.target/riscv/rvv/base/pr112431-10.c   |  2 +-
 .../gcc.target/riscv/rvv/base/pr112431-11.c   |  2 +-
 .../gcc.target/riscv/rvv/base/pr112431-12.c   |  2 +-
 34 files changed, 689 insertions(+), 11 deletions(-)
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_x-i16-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_x-i16-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_x-i16-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_x-i16-mf2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_x-i16-mf4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_x-i32-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_x-i32-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_x-i32-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_x-i32-mf2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_x-i8-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_x-i8-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_x-i8-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_x-i8-mf2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_x-i8-mf4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_x-i8-mf8.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_xu-u16-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_xu-u16-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_xu-u16-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_xu-u16-mf2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_xu-u16-mf4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_xu-u32-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_xu-u32-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_xu-u32-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_xu-u32-mf2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_xu-u8-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_xu-u8-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_xu-u8-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_xu-u8-mf2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_xu-u8-mf4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_f_xu-u8-mf8.c

-- 
2.43.0

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