[PATCH v1 4/4] RISC-V: Adjust test case due to allow vwcvt.f.x[u].v overlap

[pan2 . li]

From: Pan Li <pan2...@intel.com>

Remove the xfail due to overlap changes.

gcc/testsuite/ChangeLog:

        * gcc.target/riscv/rvv/base/pr112431-10.c: Remove xfail.
        * gcc.target/riscv/rvv/base/pr112431-11.c: Ditto.
        * gcc.target/riscv/rvv/base/pr112431-12.c: Ditto.

Signed-off-by: Pan Li <pan2...@intel.com>
---
 gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-10.c | 2 +-
 gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-11.c | 2 +-
 gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-12.c | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-10.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-10.c
index 5d3f2fbe46d..5f161b31fa1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-10.c
@@ -101,4 +101,4 @@ foo (char const *buf, size_t len)
 /* { dg-final { scan-assembler-not {vmv2r} } } */
 /* { dg-final { scan-assembler-not {vmv4r} } } */
 /* { dg-final { scan-assembler-not {vmv8r} } } */
-/* { dg-final { scan-assembler-not {csrr} { xfail riscv*-*-* } } } */
+/* { dg-final { scan-assembler-not {csrr} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-11.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-11.c
index 6a2301b523f..82827d14e34 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-11.c
@@ -65,4 +65,4 @@ foo (char const *buf, size_t len)
 /* { dg-final { scan-assembler-not {vmv2r} } } */
 /* { dg-final { scan-assembler-not {vmv4r} } } */
 /* { dg-final { scan-assembler-not {vmv8r} } } */
-/* { dg-final { scan-assembler-not {csrr} { xfail riscv*-*-* } } } */
+/* { dg-final { scan-assembler-not {csrr} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-12.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-12.c
index 0f3eb4d58de..c4ae60755ea 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-12.c
@@ -48,4 +48,4 @@ foo (char const *buf, size_t len)
 /* { dg-final { scan-assembler-not {vmv2r} } } */
 /* { dg-final { scan-assembler-not {vmv4r} } } */
 /* { dg-final { scan-assembler-not {vmv8r} } } */
-/* { dg-final { scan-assembler-not {csrr} { xfail riscv*-*-* } } } */
+/* { dg-final { scan-assembler-not {csrr} } } */
-- 
2.43.0