> Like v[sz]ext.vf8, we continue the support for vfwcvt.f.x[u].v. LGTM.
-- Regards Robin
- [PATCH v1 0/4] Support RVV register overlap for vfwcvt.f.x[u].v pan2 . li
- [PATCH v1 1/4] RISC-V: Allow RVV register overlap for vfwc... pan2 . li
- [PATCH v1 2/4] RISC-V: Add test cases for vfwcvt.f.x.v reg... pan2 . li
- [PATCH v1 4/4] RISC-V: Adjust test case due to allow vwcvt... pan2 . li
- [PATCH v1 3/4] RISC-V: Adjust test case due to allow vwcvt... pan2 . li
- Re: [PATCH v1 0/4] Support RVV register overlap for vfwcvt... Robin Dapp
