From: Pan Li <[email protected]>
The function riscv_v_widen_non_overlap_constraint_ok returns false
when the mode of the register is the same as the reference one. But
the LRA takes the inner reg of the subreg as the reference register,
for example the vs1 of the vfwsub.wv comes from the vget of the vd
register group as below.
(minus:RVVM4DF (reg/v:RVVM4DF 151)
(float_extend:RVVM4DF (subreg:RVVM2SF (reg/v:RVVM4DF 139) [32, 32])))
Then the vs2 in RVVM4DF will always be rejected by the Wn4 constraint
because the reference mode is RVVM4DF as well, and result in the ICE
as below.
during RTL pass: reload
internal compiler error: in lra_split_hard_reg_for, at
lra-assigns.cc:1908
Thus, remove the mode check and only take the register group overlap
into account for the non-overlap constraint.
gcc/ChangeLog:
* config/riscv/riscv-v.cc (riscv_v_widen_non_overlap_constraint_ok):
Remove the same mode check of the register and the reference.
Signed-off-by: Pan Li <[email protected]>
---
gcc/config/riscv/riscv-v.cc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index dd453aa320b..7499aa6451c 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -6608,7 +6608,7 @@ riscv_v_widen_non_overlap_constraint_ok (unsigned int
regno, machine_mode mode,
if (!V_REG_P (regno) || !V_REG_P (ref_regno))
return false;
- if (riscv_tuple_mode_p (mode) || ref_mode == mode)
+ if (riscv_tuple_mode_p (mode))
return false;
return !riscv_v_reg_group_overlap_p (regno, mode, ref_regno, ref_mode);
--
2.43.0
