> -----Original Message----- > From: Hans-Peter Nilsson [mailto:h...@bitrange.com] > Sent: 26 March 2013 17:43 > To: Paulo Matos > Cc: gcc@gcc.gnu.org > Subject: RE: Modeling predicate registers with more than one bit > > > > What do you mean by source modes? > > The SI and HI in subsi3 and subhi3. IIRC you said your ISA set > CC-bits differently depending on the size of the operand. >
That's true. And I am starting to think that CCMODE is exactly what I need. Even though my predicate register is QImode (8 bits), only certain bits are set depending on source modes. I can I can specify which bits are set using CCmode macros? > > I am not sure CC_MODE can solve the problem but I am not > > entirely experienced with using different CC_MODEs, the first > > thing that comes to mind is, how do you set the size of a > > CCmode? > > Unfortunately undocumented, but UTSL, for example > gcc/config/mips/mips-modes.def. > > If any register can be set to a "CC-value" then you don't need > to set any specific set of registers aside. > Not any register, only the set of predicate registers we have. What's UTSL? -- Paulo Matos
