On Thu, 27 Oct 2011, Steve Reinhardt wrote:
Hi Nilay,
I think a memory barrier may not be sufficient... we need to make sure it's
non-speculative as well as ordered (unless we do something more complicated
to deal with a speculative locked read that isn't followed by a write
because it got squashed).
I could not find anything in AMD's manual on locked instruction being
executed non-speculatively. In one of the Intel manuals, it was stated
that read portion is never is issued unless it is ensured that write
portion will also be issued. So that means that we also need mark the
instruction as non-speculative, apart from marking it as a memory barrier.
Gabe is a better reference (the only reference?) for the details of the x86
decoder.
That does not sound good.
Steve
On Thu, Oct 27, 2011 at 8:32 AM, Nilay Vaish <[email protected]> wrote:
I am thinking of marking all the locked instructions with IsMemBarrier.
Where do you think this flag should appear - in locked_opcodes.isa, or in
semaphores.py? I tried adding IsMemBarrier to the instructions in
locked_opcodes.isa, but that does not work. I changed the instruction format
to BasicOperate, that also does not work.
--
Nilay
On Wed, 26 Oct 2011, Gabe Black wrote:
I think you guys are on the right track. There's a non speculative flag,
a serialize before, and a serialize after. I'm not sure which one is
exactly right, but some combination should be. We should be careful not
to over do it since that might artificially hurt performance, but I
don't *think* the lock prefix is used all that much these days so it
shouldn't be have *too* bad an impact if it isn't perfectly correct.
Gabe
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