On Sun, January 1, 2012 9:22 pm, Ali Saidi wrote: > > On Jan 1, 2012, at 7:56 PM, Nilay Vaish wrote: > >> This is an automatically generated e-mail. To reply, visit: >> http://reviews.m5sim.org/r/954/ >> >> On January 1st, 2012, 4:40 p.m., Ali Saidi wrote: >> >> See comment below. Also, please put information in your commit message >> about when something breaks and how this fixes it. >> If that line of code is present, then on restoring from a checkpoint >> with a timing cpu (and not atomic cpu) enabled, the following error >> is received -- >> >> panic: Pio port not connected to anything! >> @ cycle 0 >> [init:build/X86_FS/dev/io_device.cc, line 74] >> Memory Usage: 3370604 KBytes >> Program aborted at cycle 0 > > Sure, but why. I can't find a place where test sys.switch_cpus being set > should cause this. I'm happy for this to the solution, but I'd like to > understand why. > >> >> It is the pio port of switch_cpus.interrupts which is not attached to >> anything. Hence, we need to remove this particular line. To me it seems >> that switch_cpus variable is required only when the option for switching >> cpus has been specified. This is means that the line should appear >> where this option is being checked, where it already does appear. >> In fact, I don't even see the point in creating switch_cpus variable >> with out checking this particular option. >> >> On January 1st, 2012, 4:40 p.m., Ali Saidi wrote: >> >> configs/common/Simulation.py (Diff revision 1) >> def run(options, root, testsys, cpu_class): >> 122 >> testsys.switch_cpus = switch_cpus >> Does normal switching fo CPUs work with this code removed? I guess you >> removed to for ruby running with a timing cpu? >> As I said above, this line again appears under the option >> for switched cpus. Therefore, I expect switching of CPUs >> to work as before. > > If you want to make this change you need to be completely certain that you > don't break existing functionality. > > Thanks, > Ali > >> >> Secondly, this change has nothing to do with Ruby. It is about >> restoring from a checkpoint with a timing cpu. >> >> - Nilay >> >> >> On December 25th, 2011, 8:53 a.m., Nilay Vaish wrote: >> >> Review request for Default. >> By Nilay Vaish. >> Updated 2011-12-25 08:53:30 >> >> Description >> >> Simulation.py: Bug in setting switch_cpus >> switch_cpus is being set whenever the CPU class is specified. This >> results in error when restoring from a checkpoint as switch_cpus >> are not connected to anything. >> Diffs >> >> configs/common/Simulation.py (ca98021c3f96) >> src/dev/io_device.cc (ca98021c3f96) >> View Diff >> > >
Ali, do you expect the following command to work -- build/X86_FS/gem5.opt configs/example/fs.py --kernel x86_64-vmlinux-2.6.22.9 -s -w 100000 --detailed --caches This also results in the same error as before -- panic: Pio port of system.switch_cpus_1.interrupts not connected to anything! @ cycle 0 [init:build/X86_FS/dev/io_device.cc, line 74] Memory Usage: 307580 KBytes Program aborted at cycle 0 Aborted Assume I am not doing any thing wrong. Since switch_cpus.interrupts is a Pio Device, its init() function will be called, and similarly for switch_cpus_1.interrupts. I think these would be connected only after the cpus that the system starts with are done. -- Nilay _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
