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This is awesome! Thanks for the work. There are two things I don't like: the namespace moves and the pkt->Packet:: stuff. I'd like to figure out ways to make it work without that. Also, did you make sure that this all still compiles with GCC? src/arch/alpha/process.cc <http://reviews.m5sim.org/r/986/#comment2404> Can you explain a little bit about what's going on here that this is necessary? I'd like to figure out another way to do this that doesn't seem so hackish. src/arch/x86/intmessage.hh <http://reviews.m5sim.org/r/986/#comment2406> This is odd. Any idea what's going on here? src/base/fast_alloc.cc <http://reviews.m5sim.org/r/986/#comment2407> Anyone know why this pragma is here in the first place? Be nice to see a comment if anyone has a clue. Steve? Your code :) src/cpu/func_unit.hh <http://reviews.m5sim.org/r/986/#comment2408> Why is this done? Does clang differentiate between classes and structs? src/cpu/o3/inst_queue.hh <http://reviews.m5sim.org/r/986/#comment2409> Don't comment out code. Just delete it. src/dev/copy_engine.cc <http://reviews.m5sim.org/r/986/#comment2410> I'd like to figure out why this is necessary and make it go away. src/python/m5/SimObject.py <http://reviews.m5sim.org/r/986/#comment2411> Dont' comment out code, please remove it. - Nathan On 2012-01-10 23:18:13, Koan-Sin Tan wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/986/ > ----------------------------------------------------------- > > (Updated 2012-01-10 23:18:13) > > > Review request for Default. > > > Summary > ------- > > Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 > + clang/llvm from Xcode 4.2 > > > Diffs > ----- > > SConstruct UNKNOWN > src/SConscript UNKNOWN > src/arch/alpha/isa/main.isa UNKNOWN > src/arch/alpha/linux/process.cc UNKNOWN > src/arch/alpha/process.cc UNKNOWN > src/arch/alpha/tlb.hh UNKNOWN > src/arch/alpha/tlb.cc UNKNOWN > src/arch/alpha/tru64/process.cc UNKNOWN > src/arch/arm/insts/static_inst.hh UNKNOWN > src/arch/arm/insts/vfp.hh UNKNOWN > src/arch/arm/isa/templates/basic.isa UNKNOWN > src/arch/x86/bios/intelmp.cc UNKNOWN > src/arch/x86/intmessage.hh UNKNOWN > src/arch/x86/linux/syscalls.cc UNKNOWN > src/arch/x86/process.cc UNKNOWN > src/base/fast_alloc.cc UNKNOWN > src/base/range_map.hh UNKNOWN > src/base/stl_helpers.hh UNKNOWN > src/cpu/func_unit.hh UNKNOWN > src/cpu/inorder/thread_context.hh UNKNOWN > src/cpu/inorder/thread_state.hh UNKNOWN > src/cpu/o3/iew.hh UNKNOWN > src/cpu/o3/inst_queue.hh UNKNOWN > src/cpu/o3/mem_dep_unit.cc UNKNOWN > src/cpu/o3/sat_counter.hh UNKNOWN > src/cpu/o3/thread_context.hh UNKNOWN > src/cpu/o3/thread_state.hh UNKNOWN > src/cpu/static_inst.hh UNKNOWN > src/cpu/thread_context.hh UNKNOWN > src/cpu/thread_state.hh UNKNOWN > src/dev/alpha/tsunami_cchip.cc UNKNOWN > src/dev/alpha/tsunami_io.cc UNKNOWN > src/dev/arm/pl111.cc UNKNOWN > src/dev/copy_engine.cc UNKNOWN > src/dev/ide_ctrl.cc UNKNOWN > src/dev/ns_gige.cc UNKNOWN > src/dev/pciconfigall.cc UNKNOWN > src/dev/pcidev.cc UNKNOWN > src/mem/cache/base.hh UNKNOWN > src/mem/packet.hh UNKNOWN > src/mem/ruby/system/Sequencer.hh UNKNOWN > src/python/m5/SimObject.py UNKNOWN > src/sim/core.hh UNKNOWN > src/sim/process.hh UNKNOWN > > Diff: http://reviews.m5sim.org/r/986/diff > > > Testing > ------- > > > Thanks, > > Koan-Sin > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
