> On 2012-01-11 10:48:20, Nathan Binkert wrote: > > src/base/fast_alloc.cc, line 45 > > <http://reviews.m5sim.org/r/986/diff/1/?file=20534#file20534line45> > > > > Anyone know why this pragma is here in the first place? Be nice to see > > a comment if anyone has a clue. Steve? Your code :)
Actually I don't know anything about this, but it's so old it predates our history (goes back to changeset 2!) so I can't determine whether it's because someone else put it in or if I did and just forgot about it. For my own dignity I will claim the former. - Steve ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/986/#review1905 ----------------------------------------------------------- On 2012-01-10 23:18:13, Koan-Sin Tan wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/986/ > ----------------------------------------------------------- > > (Updated 2012-01-10 23:18:13) > > > Review request for Default. > > > Summary > ------- > > Initial patch to make gem5 compile with clang/llvm. Tested on Mac OS X 10.7.2 > + clang/llvm from Xcode 4.2 > > > Diffs > ----- > > SConstruct UNKNOWN > src/SConscript UNKNOWN > src/arch/alpha/isa/main.isa UNKNOWN > src/arch/alpha/linux/process.cc UNKNOWN > src/arch/alpha/process.cc UNKNOWN > src/arch/alpha/tlb.hh UNKNOWN > src/arch/alpha/tlb.cc UNKNOWN > src/arch/alpha/tru64/process.cc UNKNOWN > src/arch/arm/insts/static_inst.hh UNKNOWN > src/arch/arm/insts/vfp.hh UNKNOWN > src/arch/arm/isa/templates/basic.isa UNKNOWN > src/arch/x86/bios/intelmp.cc UNKNOWN > src/arch/x86/intmessage.hh UNKNOWN > src/arch/x86/linux/syscalls.cc UNKNOWN > src/arch/x86/process.cc UNKNOWN > src/base/fast_alloc.cc UNKNOWN > src/base/range_map.hh UNKNOWN > src/base/stl_helpers.hh UNKNOWN > src/cpu/func_unit.hh UNKNOWN > src/cpu/inorder/thread_context.hh UNKNOWN > src/cpu/inorder/thread_state.hh UNKNOWN > src/cpu/o3/iew.hh UNKNOWN > src/cpu/o3/inst_queue.hh UNKNOWN > src/cpu/o3/mem_dep_unit.cc UNKNOWN > src/cpu/o3/sat_counter.hh UNKNOWN > src/cpu/o3/thread_context.hh UNKNOWN > src/cpu/o3/thread_state.hh UNKNOWN > src/cpu/static_inst.hh UNKNOWN > src/cpu/thread_context.hh UNKNOWN > src/cpu/thread_state.hh UNKNOWN > src/dev/alpha/tsunami_cchip.cc UNKNOWN > src/dev/alpha/tsunami_io.cc UNKNOWN > src/dev/arm/pl111.cc UNKNOWN > src/dev/copy_engine.cc UNKNOWN > src/dev/ide_ctrl.cc UNKNOWN > src/dev/ns_gige.cc UNKNOWN > src/dev/pciconfigall.cc UNKNOWN > src/dev/pcidev.cc UNKNOWN > src/mem/cache/base.hh UNKNOWN > src/mem/packet.hh UNKNOWN > src/mem/ruby/system/Sequencer.hh UNKNOWN > src/python/m5/SimObject.py UNKNOWN > src/sim/core.hh UNKNOWN > src/sim/process.hh UNKNOWN > > Diff: http://reviews.m5sim.org/r/986/diff > > > Testing > ------- > > > Thanks, > > Koan-Sin > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
