changeset a2ae5c378d0a in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=a2ae5c378d0a
description:
        Merge with the main repository again.

diffstat:

 configs/common/Caches.py                                                      
|     2 +-
 configs/example/fs.py                                                         
|     7 +
 configs/ruby/Ruby.py                                                          
|     5 +-
 src/arch/arm/isa/insts/misc.isa                                               
|     3 +-
 src/arch/arm/table_walker.cc                                                  
|     2 +-
 src/arch/sparc/isa/formats/basic.isa                                          
|    68 +-
 src/arch/x86/isa/microops/regop.isa                                           
|    11 +-
 src/arch/x86/predecoder.cc                                                    
|     2 +-
 src/base/bitmap.cc                                                            
|    44 +-
 src/base/bitmap.hh                                                            
|    15 +-
 src/base/compiler.hh                                                          
|     2 +
 src/base/output.cc                                                            
|   140 +-
 src/base/output.hh                                                            
|   121 +-
 src/base/stats/text.cc                                                        
|     6 +-
 src/base/trace.cc                                                             
|     2 +
 src/base/vnc/VncServer.py                                                     
|     1 +
 src/base/vnc/convert.cc                                                       
|    23 +-
 src/base/vnc/convert.hh                                                       
|    18 +-
 src/base/vnc/vncserver.cc                                                     
|    54 +-
 src/base/vnc/vncserver.hh                                                     
|    22 +
 src/cpu/BaseCPU.py                                                            
|    19 +-
 src/cpu/base.cc                                                               
|     6 +-
 src/cpu/o3/O3CPU.py                                                           
|     4 -
 src/cpu/o3/cpu.cc                                                             
|    13 +
 src/cpu/o3/cpu.hh                                                             
|     3 +
 src/dev/io_device.cc                                                          
|    12 +-
 src/dev/io_device.hh                                                          
|    36 +-
 src/dev/sparc/mm_disk.cc                                                      
|     2 +-
 src/dev/terminal.cc                                                           
|     3 +
 src/mem/physical.cc                                                           
|     3 +-
 src/mem/protocol/MOESI_hammer-cache.sm                                        
|    66 +-
 src/mem/protocol/Network_test.slicc                                           
|     1 -
 src/mem/ruby/network/topologies/MeshDirCorners.py                             
|     2 +-
 src/sim/process.cc                                                            
|     2 -
 tests/configs/o3-timing-mp.py                                                 
|     2 +-
 tests/configs/o3-timing.py                                                    
|     1 +
 tests/configs/pc-o3-timing.py                                                 
|     2 +-
 tests/configs/realview-o3-dual.py                                             
|     2 +-
 tests/configs/realview-o3.py                                                  
|     2 +-
 tests/configs/tsunami-o3-dual.py                                              
|     2 +-
 tests/configs/tsunami-o3.py                                                   
|     2 +-
 tests/long/00.gzip/ref/arm/linux/o3-timing/config.ini                         
|     2 +-
 tests/long/00.gzip/ref/arm/linux/o3-timing/simout                             
|    10 +-
 tests/long/00.gzip/ref/arm/linux/o3-timing/stats.txt                          
|   708 +-
 tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini                       
|     2 +-
 tests/long/00.gzip/ref/sparc/linux/o3-timing/simout                           
|     8 +-
 tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt                        
|    10 +-
 tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini                   
|     3 +-
 tests/long/00.gzip/ref/sparc/linux/simple-atomic/simout                       
|     8 +-
 tests/long/00.gzip/ref/sparc/linux/simple-atomic/stats.txt                    
|    10 +-
 tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini                   
|     3 +-
 tests/long/00.gzip/ref/sparc/linux/simple-timing/simout                       
|     8 +-
 tests/long/00.gzip/ref/sparc/linux/simple-timing/stats.txt                    
|    10 +-
 tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini           
|    12 +-
 tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout               
|    10 +-
 tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt            
|    10 +-
 tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini                
|    12 +-
 tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simout                    
|    10 +-
 tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt                 
|     9 +-
 tests/long/10.linux-boot/ref/arm/linux/realview-o3-dual/config.ini            
|     6 +-
 tests/long/10.linux-boot/ref/arm/linux/realview-o3-dual/simout                
|    12 +-
 tests/long/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt             
|  1882 +++++----
 tests/long/10.linux-boot/ref/arm/linux/realview-o3/config.ini                 
|     6 +-
 tests/long/10.linux-boot/ref/arm/linux/realview-o3/simout                     
|    12 +-
 tests/long/10.linux-boot/ref/arm/linux/realview-o3/stats.txt                  
|  1075 ++--
 tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini                
|     6 +-
 tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/simout                    
|    11 +-
 tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt                 
|     9 +-
 tests/long/10.mcf/ref/arm/linux/o3-timing/config.ini                          
|     4 +-
 tests/long/10.mcf/ref/arm/linux/o3-timing/simout                              
|    10 +-
 tests/long/10.mcf/ref/arm/linux/o3-timing/stats.txt                           
|   726 +-
 tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini                    
|     3 +-
 tests/long/10.mcf/ref/sparc/linux/simple-atomic/simout                        
|     8 +-
 tests/long/10.mcf/ref/sparc/linux/simple-atomic/stats.txt                     
|    10 +-
 tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini                    
|     3 +-
 tests/long/10.mcf/ref/sparc/linux/simple-timing/simout                        
|     8 +-
 tests/long/10.mcf/ref/sparc/linux/simple-timing/stats.txt                     
|    10 +-
 tests/long/20.parser/ref/arm/linux/o3-timing/config.ini                       
|     4 +-
 tests/long/20.parser/ref/arm/linux/o3-timing/simout                           
|     8 +-
 tests/long/20.parser/ref/arm/linux/o3-timing/stats.txt                        
|   814 ++--
 tests/long/30.eon/ref/arm/linux/o3-timing/config.ini                          
|     2 +-
 tests/long/30.eon/ref/arm/linux/o3-timing/simout                              
|    10 +-
 tests/long/30.eon/ref/arm/linux/o3-timing/stats.txt                           
|   718 +-
 tests/long/40.perlbmk/ref/arm/linux/o3-timing/config.ini                      
|     2 +-
 tests/long/40.perlbmk/ref/arm/linux/o3-timing/simout                          
|     8 +-
 tests/long/40.perlbmk/ref/arm/linux/o3-timing/stats.txt                       
|   714 +-
 tests/long/50.vortex/ref/arm/linux/o3-timing/config.ini                       
|     2 +-
 tests/long/50.vortex/ref/arm/linux/o3-timing/simout                           
|    10 +-
 tests/long/50.vortex/ref/arm/linux/o3-timing/stats.txt                        
|   808 ++--
 tests/long/50.vortex/ref/sparc/linux/simple-atomic/config.ini                 
|     3 +-
 tests/long/50.vortex/ref/sparc/linux/simple-atomic/simout                     
|     8 +-
 tests/long/50.vortex/ref/sparc/linux/simple-atomic/stats.txt                  
|    10 +-
 tests/long/50.vortex/ref/sparc/linux/simple-timing/config.ini                 
|     3 +-
 tests/long/50.vortex/ref/sparc/linux/simple-timing/simout                     
|     8 +-
 tests/long/50.vortex/ref/sparc/linux/simple-timing/stats.txt                  
|    10 +-
 tests/long/60.bzip2/ref/arm/linux/o3-timing/config.ini                        
|     2 +-
 tests/long/60.bzip2/ref/arm/linux/o3-timing/simout                            
|     8 +-
 tests/long/60.bzip2/ref/arm/linux/o3-timing/stats.txt                         
|   708 +-
 tests/long/70.twolf/ref/arm/linux/o3-timing/config.ini                        
|     2 +-
 tests/long/70.twolf/ref/arm/linux/o3-timing/simout                            
|    10 +-
 tests/long/70.twolf/ref/arm/linux/o3-timing/stats.txt                         
|   742 +-
 tests/long/70.twolf/ref/sparc/linux/simple-atomic/config.ini                  
|     3 +-
 tests/long/70.twolf/ref/sparc/linux/simple-atomic/simout                      
|    12 +-
 tests/long/70.twolf/ref/sparc/linux/simple-atomic/stats.txt                   
|    12 +-
 tests/long/70.twolf/ref/sparc/linux/simple-timing/config.ini                  
|     3 +-
 tests/long/70.twolf/ref/sparc/linux/simple-timing/simout                      
|    12 +-
 tests/long/70.twolf/ref/sparc/linux/simple-timing/stats.txt                   
|    12 +-
 tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini   
|    14 +
 tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout       
|     8 +-
 tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt    
|    12 +-
 tests/quick/00.hello/ref/arm/linux/o3-timing/config.ini                       
|     2 +-
 tests/quick/00.hello/ref/arm/linux/o3-timing/simout                           
|    10 +-
 tests/quick/00.hello/ref/arm/linux/o3-timing/stats.txt                        
|   648 +-
 tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/config.ini  
|     2 +-
 tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simout      
|     8 +-
 tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/stats.txt   
|    11 +-
 tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/config.ini   
|     1 +
 tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/ruby.stats   
|  1045 ++--
 tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simerr       
|   146 +-
 tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simout       
|     8 +-
 tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/stats.txt    
|    42 +-
 tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/config.ini 
|    85 +-
 tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/ruby.stats 
|   396 +-
 tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simout     
|    18 +-
 tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/stats.txt  
|    10 +-
 125 files changed, 6491 insertions(+), 6022 deletions(-)

diffs (truncated from 16856 to 300 lines):

diff -r 0909f8ed7aa0 -r a2ae5c378d0a configs/common/Caches.py
--- a/configs/common/Caches.py  Sat Jan 07 02:10:34 2012 -0800
+++ b/configs/common/Caches.py  Sat Jan 07 02:15:35 2012 -0800
@@ -33,7 +33,7 @@
     block_size = 64
     latency = '1ns'
     mshrs = 10
-    tgts_per_mshr = 5
+    tgts_per_mshr = 20
     is_top_level = True
 
 class L2Cache(BaseCache):
diff -r 0909f8ed7aa0 -r a2ae5c378d0a configs/example/fs.py
--- a/configs/example/fs.py     Sat Jan 07 02:10:34 2012 -0800
+++ b/configs/example/fs.py     Sat Jan 07 02:15:35 2012 -0800
@@ -72,6 +72,10 @@
 # System options
 parser.add_option("--kernel", action="store", type="string")
 parser.add_option("--script", action="store", type="string")
+parser.add_option("--frame-capture", action="store_true",
+        help="Stores changed frame buffers from the VNC server to compressed "\
+        "files in the gem5 output directory")
+
 if buildEnv['TARGET_ISA'] == "arm":
     parser.add_option("--bare-metal", action="store_true",
                help="Provide the raw system without the linux specific bits")
@@ -205,4 +209,7 @@
 if options.timesync:
     root.time_sync_enable = True
 
+if options.frame_capture:
+    VncServer.frame_capture = True
+
 Simulation.run(options, root, test_sys, FutureClass)
diff -r 0909f8ed7aa0 -r a2ae5c378d0a configs/ruby/Ruby.py
--- a/configs/ruby/Ruby.py      Sat Jan 07 02:10:34 2012 -0800
+++ b/configs/ruby/Ruby.py      Sat Jan 07 02:15:35 2012 -0800
@@ -58,13 +58,16 @@
     parser.add_option("--random_seed", type="int", default=1234,
                       help="Used for seeding the random number generator")
 
+    parser.add_option("--ruby_stats", type="string", default="ruby.stats")
+
     protocol = buildEnv['PROTOCOL']
     exec "import %s" % protocol
     eval("%s.define_options(parser)" % protocol)
 
 def create_system(options, system, piobus = None, dma_devices = []):
 
-    system.ruby = RubySystem(clock = options.clock)
+    system.ruby = RubySystem(clock = options.clock,
+                             stats_filename = options.ruby_stats)
     ruby = system.ruby
 
     protocol = buildEnv['PROTOCOL']
diff -r 0909f8ed7aa0 -r a2ae5c378d0a src/arch/arm/isa/insts/misc.isa
--- a/src/arch/arm/isa/insts/misc.isa   Sat Jan 07 02:10:34 2012 -0800
+++ b/src/arch/arm/isa/insts/misc.isa   Sat Jan 07 02:15:35 2012 -0800
@@ -49,7 +49,8 @@
 
     svcIop = InstObjParams("svc", "Svc", "PredOp",
                            { "code": svcCode,
-                             "predicate_test": predicateTest }, ["IsSyscall"])
+                             "predicate_test": predicateTest },
+                           ["IsSyscall", "IsNonSpeculative", 
"IsSerializeAfter"])
     header_output = BasicDeclare.subst(svcIop)
     decoder_output = BasicConstructor.subst(svcIop)
     exec_output = PredOpExecute.subst(svcIop)
diff -r 0909f8ed7aa0 -r a2ae5c378d0a src/arch/arm/table_walker.cc
--- a/src/arch/arm/table_walker.cc      Sat Jan 07 02:10:34 2012 -0800
+++ b/src/arch/arm/table_walker.cc      Sat Jan 07 02:15:35 2012 -0800
@@ -99,7 +99,7 @@
         System *sys = params()->sys;
         Tick minb = params()->min_backoff;
         Tick maxb = params()->max_backoff;
-        port = new DmaPort(this, sys, minb, maxb);
+        port = new DmaPort(this, sys, minb, maxb, true);
         return port;
     }
     return NULL;
diff -r 0909f8ed7aa0 -r a2ae5c378d0a src/arch/sparc/isa/formats/basic.isa
--- a/src/arch/sparc/isa/formats/basic.isa      Sat Jan 07 02:10:34 2012 -0800
+++ b/src/arch/sparc/isa/formats/basic.isa      Sat Jan 07 02:15:35 2012 -0800
@@ -33,6 +33,11 @@
         Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const;
 }};
 
+def template DoFpOpDeclare {{
+        Fault doFpOp(%(CPU_exec_context)s *, Trace::InstRecord *)
+            const M5_NO_INLINE;
+}};
+
 // Definitions of execute methods that panic.
 def template BasicExecPanic {{
         Fault
@@ -58,6 +63,21 @@
 }};
 
 // Basic instruction class declaration template.
+def template FpBasicDeclare {{
+        /**
+         * Static instruction class for "%(mnemonic)s".
+         */
+        class %(class_name)s : public %(base_class)s
+        {
+          public:
+            // Constructor.
+            %(class_name)s(ExtMachInst machInst);
+            %(BasicExecDeclare)s
+            %(DoFpOpDeclare)s
+        };
+}};
+
+// Basic instruction class declaration template.
 def template BasicDeclareWithMnemonic {{
         /**
          * Static instruction class for "%(mnemonic)s".
@@ -110,6 +130,22 @@
         }
 }};
 
+def template DoFpOpExecute {{
+        Fault
+        %(class_name)s::doFpOp(%(CPU_exec_context)s *xc,
+                Trace::InstRecord *traceData) const
+        {
+            Fault fault = NoFault;
+            %(op_decl)s;
+            %(op_rd)s;
+            %(fp_code)s;
+            if (fault == NoFault) {
+                %(op_wb)s;
+            }
+            return fault;
+        }
+}};
+
 // Basic decode template.
 def template BasicDecode {{
         return new %(class_name)s(machInst);
@@ -131,9 +167,9 @@
 }};
 
 def format FpBasic(code, *flags) {{
-        fp_code = """
-    Fsr |= bits(Fsr,4,0) << 5;
-    Fsr = insertBits(Fsr,4,0,0);
+    exec_code = """
+    Fsr |= bits(Fsr, 4, 0) << 5;
+    Fsr = insertBits(Fsr, 4, 0, 0);
     int newrnd = M5_FE_TONEAREST;
     switch (Fsr<31:30>) {
       case 0: newrnd = M5_FE_TONEAREST; break;
@@ -143,18 +179,18 @@
     }
     int oldrnd = m5_fegetround();
     m5_fesetround(newrnd);
+    __asm__ __volatile__("" ::: "memory");
+    fault = doFpOp(xc, traceData);
+    __asm__ __volatile__("" ::: "memory");
+    m5_fesetround(oldrnd);
+    return fault;
 """
-
-        fp_code += code
-
-
-        fp_code += """
-   m5_fesetround(oldrnd);
-"""
-        fp_code = filterDoubles(fp_code)
-        iop = InstObjParams(name, Name, 'SparcStaticInst', fp_code, flags)
-        header_output = BasicDeclare.subst(iop)
-        decoder_output = BasicConstructor.subst(iop)
-        decode_block = BasicDecode.subst(iop)
-        exec_output = BasicExecute.subst(iop)
+    fp_code = filterDoubles(code)
+    iop = InstObjParams(name, Name, 'SparcStaticInst',
+            { "code" : exec_code, "fp_code" : fp_code }, flags)
+    header_output = FpBasicDeclare.subst(iop)
+    decoder_output = BasicConstructor.subst(iop)
+    decode_block = BasicDecode.subst(iop)
+    exec_output = BasicExecute.subst(iop)
+    exec_output += DoFpOpExecute.subst(iop)
 }};
diff -r 0909f8ed7aa0 -r a2ae5c378d0a src/arch/x86/isa/microops/regop.isa
--- a/src/arch/x86/isa/microops/regop.isa       Sat Jan 07 02:10:34 2012 -0800
+++ b/src/arch/x86/isa/microops/regop.isa       Sat Jan 07 02:15:35 2012 -0800
@@ -1335,16 +1335,15 @@
                 if (selector.si || selector.ti) {
                     if (!desc.p) {
                         fault = new StackFault(selector);
-                    }
-                } else {
-                    if ((m5reg.submode != SixtyFourBitMode ||
-                                m5reg.cpl == 3) ||
-                            !(desc.s == 1 &&
-                            desc.type.codeOrData == 0 && desc.type.w) ||
+                    } else if (!(desc.s == 1 && desc.type.codeOrData == 0 &&
+                                desc.type.w) ||
                             (desc.dpl != m5reg.cpl) ||
                             (selector.rpl != m5reg.cpl)) {
                         fault = new GeneralProtection(selector);
                     }
+                } else if (m5reg.submode != SixtyFourBitMode ||
+                        m5reg.cpl == 3) {
+                    fault = new GeneralProtection(selector);
                 }
                 break;
               case SegIretCheck:
diff -r 0909f8ed7aa0 -r a2ae5c378d0a src/arch/x86/predecoder.cc
--- a/src/arch/x86/predecoder.cc        Sat Jan 07 02:10:34 2012 -0800
+++ b/src/arch/x86/predecoder.cc        Sat Jan 07 02:15:35 2012 -0800
@@ -186,7 +186,7 @@
             DPRINTF(Predecoder, "Found two byte opcode.\n");
             emi.opcode.prefixA = nextByte;
         }
-        else if(emi.opcode.num == 2 && (nextByte == 0x38 || nextByte == 0x3F))
+        else if(emi.opcode.num == 2 && (nextByte == 0x38 || nextByte == 0x3A))
         {
             nextState = OpcodeState;
             DPRINTF(Predecoder, "Found three byte opcode.\n");
diff -r 0909f8ed7aa0 -r a2ae5c378d0a src/base/bitmap.cc
--- a/src/base/bitmap.cc        Sat Jan 07 02:10:34 2012 -0800
+++ b/src/base/bitmap.cc        Sat Jan 07 02:15:35 2012 -0800
@@ -36,6 +36,7 @@
  *
  * Authors: William Wang
  *          Ali Saidi
+ *          Chris Emmons
  */
 
 #include <cassert>
@@ -43,29 +44,50 @@
 #include "base/bitmap.hh"
 #include "base/misc.hh"
 
+const size_t Bitmap::sizeofHeaderBuffer = sizeof(Magic) + sizeof(Header) +
+                                        sizeof(Info);
+
 // bitmap class ctor
 Bitmap::Bitmap(VideoConvert::Mode _mode, uint16_t w, uint16_t h, uint8_t *d)
     : mode(_mode), height(h), width(w), data(d),
-    vc(mode, VideoConvert::rgb8888, width, height)
+    vc(mode, VideoConvert::rgb8888, width, height), headerBuffer(0)
 {
 }
 
+Bitmap::~Bitmap() {
+    if (headerBuffer)
+        delete [] headerBuffer;
+}
+
 void
-Bitmap::write(std::ostream *bmp)
+Bitmap::write(std::ostream *bmp) const
 {
     assert(data);
 
-    // For further information see: 
http://en.wikipedia.org/wiki/BMP_file_format
-    Magic  magic = {{'B','M'}};
-    Header header = {sizeof(VideoConvert::Rgb8888) * width * height , 0, 0, 
54};
-    Info   info = {sizeof(Info), width, height, 1,
-                   sizeof(VideoConvert::Rgb8888) * 8, 0,
-                   sizeof(VideoConvert::Rgb8888) * width * height, 1, 1, 0, 0};
+    // header is always the same for a bitmap object; compute the info once per
+    //   bitmap object
+    if (!headerBuffer) {
+        // For further information see:
+        //   http://en.wikipedia.org/wiki/BMP_file_format
+        Magic magic = {{'B','M'}};
+        Header header = {sizeof(VideoConvert::Rgb8888) * width * height,
+                                0, 0, 54};
+        Info info = {sizeof(Info), width, height, 1,
+                    sizeof(VideoConvert::Rgb8888) * 8, 0,
+                    sizeof(VideoConvert::Rgb8888) * width * height, 1, 1, 0, 
0};
 
-    bmp->write(reinterpret_cast<char*>(&magic),  sizeof(magic));
-    bmp->write(reinterpret_cast<char*>(&header), sizeof(header));
-    bmp->write(reinterpret_cast<char*>(&info),   sizeof(info));
+        char *p = headerBuffer = new char[sizeofHeaderBuffer];
+        memcpy(p, &magic, sizeof(Magic));
+        p += sizeof(Magic);
+        memcpy(p, &header, sizeof(Header));
+        p += sizeof(Header);
+        memcpy(p, &info,   sizeof(Info));
+    }
 
+    // 1.  write the header
+    bmp->write(headerBuffer, sizeofHeaderBuffer);
+
+    // 2.  write the bitmap data
     uint8_t *tmp = vc.convert(data);
     uint32_t *tmp32 = (uint32_t*)tmp;
 
diff -r 0909f8ed7aa0 -r a2ae5c378d0a src/base/bitmap.hh
--- a/src/base/bitmap.hh        Sat Jan 07 02:10:34 2012 -0800
+++ b/src/base/bitmap.hh        Sat Jan 07 02:15:35 2012 -0800
@@ -36,6 +36,7 @@
  *
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