changeset 669e93d79ed9 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=669e93d79ed9
description:
Implement Ali's review feedback.
Try to decrease indentation, and remove some redundant FullSystem
checks.
diffstat:
src/arch/alpha/faults.cc | 44 ++--
src/arch/alpha/remote_gdb.cc | 75 ++++----
src/arch/alpha/utility.cc | 30 +-
src/arch/arm/faults.cc | 65 ++++---
src/arch/arm/tlb.cc | 20 +-
src/arch/arm/utility.cc | 76 ++++----
src/arch/mips/tlb.cc | 34 ++--
src/arch/power/tlb.cc | 13 +-
src/arch/power/vtophys.cc | 11 +-
src/arch/sparc/faults.cc | 117 +++++++-------
src/arch/sparc/utility.cc | 24 +-
src/arch/x86/faults.cc | 80 +++++----
src/cpu/inorder/inorder_dyn_inst.cc | 9 +-
src/cpu/o3/dyn_inst_impl.hh | 21 +-
src/cpu/o3/thread_state.hh | 29 +-
src/cpu/simple/base.hh | 4 +-
src/cpu/thread_state.cc | 34 ++--
src/dev/alpha/backdoor.cc | 6 +-
src/sim/pseudo_inst.cc | 281 +++++++++++++++++------------------
src/sim/system.cc | 12 +-
20 files changed, 490 insertions(+), 495 deletions(-)
diffs (truncated from 1431 to 300 lines):
diff -r 42dd80cf4cb4 -r 669e93d79ed9 src/arch/alpha/faults.cc
--- a/src/arch/alpha/faults.cc Sat Jan 28 07:24:56 2012 -0800
+++ b/src/arch/alpha/faults.cc Sun Jan 29 02:04:34 2012 -0800
@@ -187,16 +187,17 @@
{
if (FullSystem) {
ItbFault::invoke(tc);
+ return;
+ }
+
+ Process *p = tc->getProcessPtr();
+ TlbEntry entry;
+ bool success = p->pTable->lookup(pc, entry);
+ if (!success) {
+ panic("Tried to execute unmapped address %#x.\n", pc);
} else {
- Process *p = tc->getProcessPtr();
- TlbEntry entry;
- bool success = p->pTable->lookup(pc, entry);
- if (!success) {
- panic("Tried to execute unmapped address %#x.\n", pc);
- } else {
- VAddr vaddr(pc);
- tc->getITBPtr()->insert(vaddr.page(), entry);
- }
+ VAddr vaddr(pc);
+ tc->getITBPtr()->insert(vaddr.page(), entry);
}
}
@@ -205,19 +206,20 @@
{
if (FullSystem) {
DtbFault::invoke(tc, inst);
+ return;
+ }
+
+ Process *p = tc->getProcessPtr();
+ TlbEntry entry;
+ bool success = p->pTable->lookup(vaddr, entry);
+ if (!success) {
+ if (p->fixupStackFault(vaddr))
+ success = p->pTable->lookup(vaddr, entry);
+ }
+ if (!success) {
+ panic("Tried to access unmapped address %#x.\n", (Addr)vaddr);
} else {
- Process *p = tc->getProcessPtr();
- TlbEntry entry;
- bool success = p->pTable->lookup(vaddr, entry);
- if (!success) {
- if (p->fixupStackFault(vaddr))
- success = p->pTable->lookup(vaddr, entry);
- }
- if (!success) {
- panic("Tried to access unmapped address %#x.\n", (Addr)vaddr);
- } else {
- tc->getDTBPtr()->insert(vaddr.page(), entry);
- }
+ tc->getDTBPtr()->insert(vaddr.page(), entry);
}
}
diff -r 42dd80cf4cb4 -r 669e93d79ed9 src/arch/alpha/remote_gdb.cc
--- a/src/arch/alpha/remote_gdb.cc Sat Jan 28 07:24:56 2012 -0800
+++ b/src/arch/alpha/remote_gdb.cc Sun Jan 29 02:04:34 2012 -0800
@@ -156,51 +156,50 @@
bool
RemoteGDB::acc(Addr va, size_t len)
{
- if (FullSystem) {
- Addr last_va;
+ if (!FullSystem)
+ panic("acc function needs to be rewritten for SE mode\n");
- va = TruncPage(va);
- last_va = RoundPage(va + len);
+ Addr last_va;
- do {
- if (IsK0Seg(va)) {
- if (va < (K0SegBase + pmem->size())) {
- DPRINTF(GDBAcc, "acc: Mapping is valid K0SEG <= "
- "%#x < K0SEG + size\n", va);
- return true;
- } else {
- DPRINTF(GDBAcc, "acc: Mapping invalid %#x "
- "> K0SEG + size\n", va);
- return false;
- }
- }
+ va = TruncPage(va);
+ last_va = RoundPage(va + len);
- /**
- * This code says that all accesses to palcode (instruction
- * and data) are valid since there isn't a va->pa mapping
- * because palcode is accessed physically. At some point this
- * should probably be cleaned up but there is no easy way to
- * do it.
- */
-
- if (PcPAL(va) || va < 0x10000)
+ do {
+ if (IsK0Seg(va)) {
+ if (va < (K0SegBase + pmem->size())) {
+ DPRINTF(GDBAcc, "acc: Mapping is valid K0SEG <= "
+ "%#x < K0SEG + size\n", va);
return true;
-
- Addr ptbr = context->readMiscRegNoEffect(IPR_PALtemp20);
- PageTableEntry pte =
- kernel_pte_lookup(context->getPhysProxy(), ptbr, va);
- if (!pte.valid()) {
- DPRINTF(GDBAcc, "acc: %#x pte is invalid\n", va);
+ } else {
+ DPRINTF(GDBAcc, "acc: Mapping invalid %#x "
+ "> K0SEG + size\n", va);
return false;
}
- va += PageBytes;
- } while (va < last_va);
+ }
- DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va);
- return true;
- } else {
- panic("acc function needs to be rewritten for SE mode\n");
- }
+ /**
+ * This code says that all accesses to palcode (instruction
+ * and data) are valid since there isn't a va->pa mapping
+ * because palcode is accessed physically. At some point this
+ * should probably be cleaned up but there is no easy way to
+ * do it.
+ */
+
+ if (PcPAL(va) || va < 0x10000)
+ return true;
+
+ Addr ptbr = context->readMiscRegNoEffect(IPR_PALtemp20);
+ PageTableEntry pte =
+ kernel_pte_lookup(context->getPhysProxy(), ptbr, va);
+ if (!pte.valid()) {
+ DPRINTF(GDBAcc, "acc: %#x pte is invalid\n", va);
+ return false;
+ }
+ va += PageBytes;
+ } while (va < last_va);
+
+ DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va);
+ return true;
}
/*
diff -r 42dd80cf4cb4 -r 669e93d79ed9 src/arch/alpha/utility.cc
--- a/src/arch/alpha/utility.cc Sat Jan 28 07:24:56 2012 -0800
+++ b/src/arch/alpha/utility.cc Sun Jan 29 02:04:34 2012 -0800
@@ -39,24 +39,24 @@
uint64_t
getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
{
- if (FullSystem) {
- const int NumArgumentRegs = 6;
- if (number < NumArgumentRegs) {
- if (fp)
- return tc->readFloatRegBits(16 + number);
- else
- return tc->readIntReg(16 + number);
- } else {
- Addr sp = tc->readIntReg(StackPointerReg);
- FSTranslatingPortProxy* vp = tc->getVirtProxy();
- uint64_t arg = vp->read<uint64_t>(sp +
- (number-NumArgumentRegs) * sizeof(uint64_t));
- return arg;
- }
- } else {
+ if (!FullSystem) {
panic("getArgument() is Full system only\n");
M5_DUMMY_RETURN;
}
+
+ const int NumArgumentRegs = 6;
+ if (number < NumArgumentRegs) {
+ if (fp)
+ return tc->readFloatRegBits(16 + number);
+ else
+ return tc->readIntReg(16 + number);
+ } else {
+ Addr sp = tc->readIntReg(StackPointerReg);
+ FSTranslatingPortProxy* vp = tc->getVirtProxy();
+ uint64_t arg = vp->read<uint64_t>(sp +
+ (number-NumArgumentRegs) * sizeof(uint64_t));
+ return arg;
+ }
}
void
diff -r 42dd80cf4cb4 -r 669e93d79ed9 src/arch/arm/faults.cc
--- a/src/arch/arm/faults.cc Sat Jan 28 07:24:56 2012 -0800
+++ b/src/arch/arm/faults.cc Sun Jan 29 02:04:34 2012 -0800
@@ -178,19 +178,20 @@
{
if (FullSystem) {
ArmFault::invoke(tc, inst);
+ return;
+ }
+
+ // If the mnemonic isn't defined this has to be an unknown instruction.
+ assert(unknown || mnemonic != NULL);
+ if (disabled) {
+ panic("Attempted to execute disabled instruction "
+ "'%s' (inst 0x%08x)", mnemonic, machInst);
+ } else if (unknown) {
+ panic("Attempted to execute unknown instruction (inst 0x%08x)",
+ machInst);
} else {
- // If the mnemonic isn't defined this has to be an unknown instruction.
- assert(unknown || mnemonic != NULL);
- if (disabled) {
- panic("Attempted to execute disabled instruction "
- "'%s' (inst 0x%08x)", mnemonic, machInst);
- } else if (unknown) {
- panic("Attempted to execute unknown instruction (inst 0x%08x)",
- machInst);
- } else {
- panic("Attempted to execute unimplemented instruction "
- "'%s' (inst 0x%08x)", mnemonic, machInst);
- }
+ panic("Attempted to execute unimplemented instruction "
+ "'%s' (inst 0x%08x)", mnemonic, machInst);
}
}
@@ -199,19 +200,20 @@
{
if (FullSystem) {
ArmFault::invoke(tc, inst);
- } else {
- // As of now, there isn't a 32 bit thumb version of this instruction.
- assert(!machInst.bigThumb);
- uint32_t callNum;
- callNum = tc->readIntReg(INTREG_R7);
- tc->syscall(callNum);
+ return;
+ }
- // Advance the PC since that won't happen automatically.
- PCState pc = tc->pcState();
- assert(inst);
- inst->advancePC(pc);
- tc->pcState(pc);
- }
+ // As of now, there isn't a 32 bit thumb version of this instruction.
+ assert(!machInst.bigThumb);
+ uint32_t callNum;
+ callNum = tc->readIntReg(INTREG_R7);
+ tc->syscall(callNum);
+
+ // Advance the PC since that won't happen automatically.
+ PCState pc = tc->pcState();
+ assert(inst);
+ inst->advancePC(pc);
+ tc->pcState(pc);
}
template<class T>
@@ -252,13 +254,14 @@
void
ArmSev::invoke(ThreadContext *tc, StaticInstPtr inst) {
DPRINTF(Faults, "Invoking ArmSev Fault\n");
- if (FullSystem) {
- // Set sev_mailbox to 1, clear the pending interrupt from remote
- // SEV execution and let pipeline continue as pcState is still
- // valid.
- tc->setMiscReg(MISCREG_SEV_MAILBOX, 1);
- tc->getCpuPtr()->clearInterrupt(INT_SEV, 0);
- }
+ if (!FullSystem)
+ return;
+
+ // Set sev_mailbox to 1, clear the pending interrupt from remote
+ // SEV execution and let pipeline continue as pcState is still
+ // valid.
+ tc->setMiscReg(MISCREG_SEV_MAILBOX, 1);
+ tc->getCpuPtr()->clearInterrupt(INT_SEV, 0);
}
// return via SUBS pc, lr, xxx; rfe, movs, ldm
diff -r 42dd80cf4cb4 -r 669e93d79ed9 src/arch/arm/tlb.cc
--- a/src/arch/arm/tlb.cc Sat Jan 28 07:24:56 2012 -0800
+++ b/src/arch/arm/tlb.cc Sun Jan 29 02:04:34 2012 -0800
@@ -418,14 +418,12 @@
}
}
- if (!FullSystem) {
- Addr paddr;
- Process *p = tc->getProcessPtr();
+ Addr paddr;
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