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(Updated March 14, 2012, 11:20 a.m.) Review request for Default. Summary (updated) ----------------- updates Description (updated) ------- Changeset 8896:6976246c35f1 --------------------------- updates Diffs (updated) ----- src/cpu/base.cc ad5f1f128fafebd4c6641f72c7872d669c1dc239 src/cpu/o3/commit_impl.hh ad5f1f128fafebd4c6641f72c7872d669c1dc239 src/cpu/o3/cpu.cc ad5f1f128fafebd4c6641f72c7872d669c1dc239 src/cpu/o3/iew.hh ad5f1f128fafebd4c6641f72c7872d669c1dc239 src/cpu/o3/lsq_unit.hh ad5f1f128fafebd4c6641f72c7872d669c1dc239 Diff: http://reviews.gem5.org/r/1092/diff/ Testing ------- Allows multiple switchouts of O3CPU using the attached config file. Both CPU's maintain separate (overlapping) seqNums, see ./src/cpu/o3/cpu.cc:1239 for further detail... Thanks, Andrew Lukefahr _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
