> On May 2, 2012, 12:53 p.m., Ali Saidi wrote:
> > anyone have any issues with this or should I commit it?
> >

There are some redundant whitespace changes that should be removed. In 
addition, the port rejigging is not up to date (still using getPeer setPeer), 
so the patch won't apply cleanly.

Other than that, I'm all happy.


- Andreas


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On March 16, 2012, 7:40 a.m., Andrew Lukefahr wrote:
> 
> -----------------------------------------------------------
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/1092/
> -----------------------------------------------------------
> 
> (Updated March 16, 2012, 7:40 a.m.)
> 
> 
> Review request for Default.
> 
> 
> Description
> -------
> 
> Changeset 8896:6f0169698281
> ---------------------------
> fixed drainCount
> 
> 
> Diffs
> -----
> 
>   src/cpu/base.cc ad5f1f128fafebd4c6641f72c7872d669c1dc239 
>   src/cpu/o3/commit_impl.hh ad5f1f128fafebd4c6641f72c7872d669c1dc239 
>   src/cpu/o3/cpu.cc ad5f1f128fafebd4c6641f72c7872d669c1dc239 
>   src/cpu/o3/fetch_impl.hh ad5f1f128fafebd4c6641f72c7872d669c1dc239 
>   src/cpu/o3/iew.hh ad5f1f128fafebd4c6641f72c7872d669c1dc239 
>   src/cpu/o3/lsq_unit.hh ad5f1f128fafebd4c6641f72c7872d669c1dc239 
>   src/sim/eventq.cc ad5f1f128fafebd4c6641f72c7872d669c1dc239 
>   src/sim/sim_events.hh ad5f1f128fafebd4c6641f72c7872d669c1dc239 
>   src/sim/sim_events.cc ad5f1f128fafebd4c6641f72c7872d669c1dc239 
>   src/sim/sim_exit.hh ad5f1f128fafebd4c6641f72c7872d669c1dc239 
>   src/sim/simulate.cc ad5f1f128fafebd4c6641f72c7872d669c1dc239 
> 
> Diff: http://reviews.gem5.org/r/1092/diff/
> 
> 
> Testing
> -------
> 
> Allows multiple switchouts of O3CPU using the attached config file.  
> 
> Both CPU's maintain separate (overlapping) seqNums, see 
> ./src/cpu/o3/cpu.cc:1239 for further detail... 
> 
> 
> Thanks,
> 
> Andrew Lukefahr
> 
>

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