> On May 8, 2012, 9:06 a.m., Ali Saidi wrote: > > src/mem/packet.hh, line 94 > > <http://reviews.gem5.org/r/1169/diff/1/?file=26170#file26170line94> > > > > hrm.. I think we probably want to do full block writes with > > writeinvrequest.
I am perfectly fine with not removing it if it is indeed used, the question is who wants to change the DMA to use it again, and when? (I don't know the cache models well enough to feel comfortable in making this type of change at the moment.) Any volunteers? - Andreas ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1169/#review2663 ----------------------------------------------------------- On May 2, 2012, 7:15 a.m., Andreas Hansson wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1169/ > ----------------------------------------------------------- > > (Updated May 2, 2012, 7:15 a.m.) > > > Review request for Default. > > > Description > ------- > > Packet: Cleaning up packet command and attribute > > This patch removes unused commands and attributes from the packet to > avoid any confusion. It is part of an effort to clear up how and where > different commands and attributes are used. > > > Diffs > ----- > > src/mem/packet.hh 7f36d4436074 > src/mem/packet.cc 7f36d4436074 > > Diff: http://reviews.gem5.org/r/1169/diff/ > > > Testing > ------- > > util/regress all passing (disregarding t1000 and eio) > > > Thanks, > > Andreas Hansson > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
