> On May 20, 2012, 5:44 p.m., Steve Reinhardt wrote: > > src/cpu/legiontrace.cc, line 430 > > <http://reviews.gem5.org/r/1195/diff/1/?file=26411#file26411line430> > > > > the concept of "extMachInst" is meaningless now, so this function name > > doesn't make sense in context. should it be decoderReady() or something > > like that?
It isn't meaningless yet. Also, the decoder being ready is ambiguous. Ready for what? More bytes? To return an instruction? > On May 20, 2012, 5:44 p.m., Steve Reinhardt wrote: > > src/cpu/o3/fetch_impl.hh, line 1198 > > <http://reviews.gem5.org/r/1195/diff/1/?file=26413#file26413line1198> > > > > similar thing here... how is !extMachInstReady() at this point > > different from needMoreBytes()? The latter sounds more intuitively like > > what you want to call based on the name of the flag. !extMachInstReady is not the same as needMoreBytes at all. There may be many instructions in the same MachInst blob of bytes. There may be many MachInst blobs before we get a complete instruction. > On May 20, 2012, 5:44 p.m., Steve Reinhardt wrote: > > src/cpu/checker/cpu_impl.hh, line 318 > > <http://reviews.gem5.org/r/1195/diff/1/?file=26403#file26403line318> > > > > Why aren't we skipping the ExtMachInst completely here, and just doing > > instPtr = thread->decoder.decode(pcState) > > ? Because I don't want to change how the checker works while I'm working on something else. - Gabe ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1195/#review2763 ----------------------------------------------------------- On May 15, 2012, 5:56 a.m., Gabe Black wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1195/ > ----------------------------------------------------------- > > (Updated May 15, 2012, 5:56 a.m.) > > > Review request for Default. > > > Description > ------- > > Changeset 9009:769d2142cbd4 > --------------------------- > CPU: Merge the predecoder and decoder. > > These classes are always used together, and merging them will give the ISAs > more flexibility in how they cache things and manage the process. > > > Diffs > ----- > > src/arch/SConscript f681719e2e99 > src/arch/alpha/decoder.hh PRE-CREATION > src/arch/alpha/isa/main.isa f681719e2e99 > src/arch/alpha/predecoder.hh f681719e2e99 > src/arch/arm/SConscript f681719e2e99 > src/arch/arm/decoder.hh PRE-CREATION > src/arch/arm/decoder.cc PRE-CREATION > src/arch/arm/predecoder.hh f681719e2e99 > src/arch/arm/predecoder.cc f681719e2e99 > src/arch/arm/types.hh f681719e2e99 > src/arch/mips/decoder.hh PRE-CREATION > src/arch/mips/predecoder.hh f681719e2e99 > src/arch/power/decoder.hh PRE-CREATION > src/arch/sparc/decoder.hh PRE-CREATION > src/arch/sparc/predecoder.hh f681719e2e99 > src/arch/x86/SConscript f681719e2e99 > src/arch/x86/decoder.hh PRE-CREATION > src/arch/x86/decoder.cc PRE-CREATION > src/arch/x86/decoder_tables.cc PRE-CREATION > src/arch/x86/emulenv.cc f681719e2e99 > src/arch/x86/isa/decoder/one_byte_opcodes.isa f681719e2e99 > src/arch/x86/predecoder.hh f681719e2e99 > src/arch/x86/predecoder.cc f681719e2e99 > src/arch/x86/predecoder_tables.cc f681719e2e99 > src/arch/x86/types.hh f681719e2e99 > src/cpu/base.hh f681719e2e99 > src/cpu/checker/cpu.hh f681719e2e99 > src/cpu/checker/cpu_impl.hh f681719e2e99 > src/cpu/inorder/cpu.hh f681719e2e99 > src/cpu/inorder/cpu.cc f681719e2e99 > src/cpu/inorder/resources/cache_unit.hh f681719e2e99 > src/cpu/inorder/resources/cache_unit.cc f681719e2e99 > src/cpu/inorder/resources/fetch_unit.hh f681719e2e99 > src/cpu/inorder/resources/fetch_unit.cc f681719e2e99 > src/cpu/inorder/thread_context.hh f681719e2e99 > src/cpu/legiontrace.cc f681719e2e99 > src/cpu/o3/fetch.hh f681719e2e99 > src/cpu/o3/fetch_impl.hh f681719e2e99 > src/cpu/simple/atomic.cc f681719e2e99 > src/cpu/simple/base.hh f681719e2e99 > src/cpu/simple/base.cc f681719e2e99 > src/cpu/simple_thread.cc f681719e2e99 > > Diff: http://reviews.gem5.org/r/1195/diff/ > > > Testing > ------- > > > Thanks, > > Gabe Black > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
