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Ship it! Thanks for the changes! - Steve Reinhardt On May 25, 2012, 3:33 a.m., Gabe Black wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1195/ > ----------------------------------------------------------- > > (Updated May 25, 2012, 3:33 a.m.) > > > Review request for Default. > > > Description > ------- > > Changeset 9023:ea2094694097 > --------------------------- > CPU: Merge the predecoder and decoder. > > These classes are always used together, and merging them will give the ISAs > more flexibility in how they cache things and manage the process. > > > Diffs > ----- > > src/arch/SConscript bb25e7646c41 > src/arch/alpha/decoder.hh bb25e7646c41 > src/arch/alpha/isa/main.isa bb25e7646c41 > src/arch/alpha/predecoder.hh bb25e7646c41 > src/arch/arm/SConscript bb25e7646c41 > src/arch/arm/decoder.hh bb25e7646c41 > src/arch/arm/decoder.cc bb25e7646c41 > src/arch/arm/predecoder.hh bb25e7646c41 > src/arch/arm/predecoder.cc bb25e7646c41 > src/arch/arm/types.hh bb25e7646c41 > src/arch/mips/decoder.hh bb25e7646c41 > src/arch/mips/predecoder.hh bb25e7646c41 > src/arch/power/decoder.hh bb25e7646c41 > src/arch/power/predecoder.hh bb25e7646c41 > src/arch/sparc/decoder.hh bb25e7646c41 > src/arch/sparc/predecoder.hh bb25e7646c41 > src/arch/x86/SConscript bb25e7646c41 > src/arch/x86/decoder.hh bb25e7646c41 > src/arch/x86/decoder.cc bb25e7646c41 > src/arch/x86/decoder_tables.cc PRE-CREATION > src/arch/x86/emulenv.cc bb25e7646c41 > src/arch/x86/isa/decoder/one_byte_opcodes.isa bb25e7646c41 > src/arch/x86/predecoder.hh bb25e7646c41 > src/arch/x86/predecoder.cc bb25e7646c41 > src/arch/x86/predecoder_tables.cc bb25e7646c41 > src/arch/x86/types.hh bb25e7646c41 > src/cpu/base.hh bb25e7646c41 > src/cpu/checker/cpu.hh bb25e7646c41 > src/cpu/checker/cpu_impl.hh bb25e7646c41 > src/cpu/inorder/cpu.hh bb25e7646c41 > src/cpu/inorder/cpu.cc bb25e7646c41 > src/cpu/inorder/resources/cache_unit.hh bb25e7646c41 > src/cpu/inorder/resources/cache_unit.cc bb25e7646c41 > src/cpu/inorder/resources/fetch_unit.hh bb25e7646c41 > src/cpu/inorder/resources/fetch_unit.cc bb25e7646c41 > src/cpu/inorder/thread_context.hh bb25e7646c41 > src/cpu/legiontrace.cc bb25e7646c41 > src/cpu/o3/fetch.hh bb25e7646c41 > src/cpu/o3/fetch_impl.hh bb25e7646c41 > src/cpu/o3/thread_context.hh bb25e7646c41 > src/cpu/simple/atomic.cc bb25e7646c41 > src/cpu/simple/base.hh bb25e7646c41 > src/cpu/simple/base.cc bb25e7646c41 > src/cpu/simple_thread.cc bb25e7646c41 > > Diff: http://reviews.gem5.org/r/1195/diff/ > > > Testing > ------- > > > Thanks, > > Gabe Black > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
