changeset 019047ead23b in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=019047ead23b
description:
Device: Remove overloaded pio_latency parameter
This patch removes the overloading of the parameter, which seems both
redundant, and possibly incorrect.
The PciConfigAll now also uses a Param.Latency rather than a
Param.Tick. For backwards compatibility it still sets the pio_latency
to 1 tick. All the comments have also been updated to not state that
it is in simticks when it is not necessarily the case.
diffstat:
src/arch/x86/X86LocalApic.py | 1 -
src/dev/Device.py | 2 +-
src/dev/Pci.py | 6 ++++--
src/dev/sparc/T1000.py | 2 +-
src/dev/x86/Cmos.py | 1 -
src/dev/x86/I8042.py | 1 -
src/dev/x86/I82094AA.py | 2 --
src/dev/x86/I8237.py | 1 -
src/dev/x86/I8254.py | 1 -
src/dev/x86/I8259.py | 1 -
src/dev/x86/PcSpeaker.py | 1 -
src/dev/x86/SouthBridge.py | 1 -
12 files changed, 6 insertions(+), 14 deletions(-)
diffs (140 lines):
diff -r e353c178fb36 -r 019047ead23b src/arch/x86/X86LocalApic.py
--- a/src/arch/x86/X86LocalApic.py Tue Aug 21 05:49:43 2012 -0400
+++ b/src/arch/x86/X86LocalApic.py Tue Aug 21 05:50:03 2012 -0400
@@ -46,7 +46,6 @@
class X86LocalApic(BasicPioDevice):
type = 'X86LocalApic'
cxx_class = 'X86ISA::Interrupts'
- pio_latency = Param.Latency('1ns', 'Programmed IO latency in simticks')
int_master = MasterPort("Port for sending interrupt messages")
int_slave = SlavePort("Port for receiving interrupt messages")
int_latency = Param.Latency('1ns', \
diff -r e353c178fb36 -r 019047ead23b src/dev/Device.py
--- a/src/dev/Device.py Tue Aug 21 05:49:43 2012 -0400
+++ b/src/dev/Device.py Tue Aug 21 05:50:03 2012 -0400
@@ -40,7 +40,7 @@
type = 'BasicPioDevice'
abstract = True
pio_addr = Param.Addr("Device Address")
- pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
+ pio_latency = Param.Latency('1ns', "Programmed IO latency")
class DmaDevice(PioDevice):
type = 'DmaDevice'
diff -r e353c178fb36 -r 019047ead23b src/dev/Pci.py
--- a/src/dev/Pci.py Tue Aug 21 05:49:43 2012 -0400
+++ b/src/dev/Pci.py Tue Aug 21 05:50:03 2012 -0400
@@ -34,7 +34,9 @@
class PciConfigAll(PioDevice):
type = 'PciConfigAll'
platform = Param.Platform(Parent.any, "Platform this device is part of.")
- pio_latency = Param.Tick(1, "Programmed IO latency in simticks")
+ # @todo: This latency is unrealistically low and only kept at 1 tick
+ # to not change any regressions
+ pio_latency = Param.Latency('1t', "Programmed IO latency")
bus = Param.UInt8(0x00, "PCI bus to act as config space for")
size = Param.MemorySize32('16MB', "Size of config space")
@@ -47,7 +49,7 @@
pci_bus = Param.Int("PCI bus")
pci_dev = Param.Int("PCI device number")
pci_func = Param.Int("PCI function code")
- pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
+ pio_latency = Param.Latency('1ns', "Programmed IO latency")
config_latency = Param.Latency('20ns', "Config read or write latency")
VendorID = Param.UInt16("Vendor ID")
diff -r e353c178fb36 -r 019047ead23b src/dev/sparc/T1000.py
--- a/src/dev/sparc/T1000.py Tue Aug 21 05:49:43 2012 -0400
+++ b/src/dev/sparc/T1000.py Tue Aug 21 05:50:03 2012 -0400
@@ -47,7 +47,7 @@
class Iob(PioDevice):
type = 'Iob'
platform = Param.Platform(Parent.any, "Platform this device is part of.")
- pio_latency = Param.Latency('1ns', "Programed IO latency in simticks")
+ pio_latency = Param.Latency('1ns', "Programed IO latency")
class T1000(Platform):
diff -r e353c178fb36 -r 019047ead23b src/dev/x86/Cmos.py
--- a/src/dev/x86/Cmos.py Tue Aug 21 05:49:43 2012 -0400
+++ b/src/dev/x86/Cmos.py Tue Aug 21 05:50:03 2012 -0400
@@ -36,6 +36,5 @@
cxx_class='X86ISA::Cmos'
time = Param.Time('01/01/2012',
"System time to use ('Now' for actual time)")
- pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
int_pin = Param.X86IntSourcePin(X86IntSourcePin(),
'Pin to signal RTC alarm interrupts to')
diff -r e353c178fb36 -r 019047ead23b src/dev/x86/I8042.py
--- a/src/dev/x86/I8042.py Tue Aug 21 05:49:43 2012 -0400
+++ b/src/dev/x86/I8042.py Tue Aug 21 05:50:03 2012 -0400
@@ -34,7 +34,6 @@
class I8042(BasicPioDevice):
type = 'I8042'
cxx_class = 'X86ISA::I8042'
- pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
# This isn't actually used for anything here.
pio_addr = 0x0
data_port = Param.Addr('Data port address')
diff -r e353c178fb36 -r 019047ead23b src/dev/x86/I82094AA.py
--- a/src/dev/x86/I82094AA.py Tue Aug 21 05:49:43 2012 -0400
+++ b/src/dev/x86/I82094AA.py Tue Aug 21 05:50:03 2012 -0400
@@ -35,8 +35,6 @@
type = 'I82094AA'
cxx_class = 'X86ISA::I82094AA'
apic_id = Param.Int(1, 'APIC id for this IO APIC')
- pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
- pio_addr = Param.Addr("Device address")
int_master = MasterPort("Port for sending interrupt messages")
int_latency = Param.Latency('1ns', \
"Latency for an interrupt to propagate through this device.")
diff -r e353c178fb36 -r 019047ead23b src/dev/x86/I8237.py
--- a/src/dev/x86/I8237.py Tue Aug 21 05:49:43 2012 -0400
+++ b/src/dev/x86/I8237.py Tue Aug 21 05:50:03 2012 -0400
@@ -33,4 +33,3 @@
class I8237(BasicPioDevice):
type = 'I8237'
cxx_class = 'X86ISA::I8237'
- pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
diff -r e353c178fb36 -r 019047ead23b src/dev/x86/I8254.py
--- a/src/dev/x86/I8254.py Tue Aug 21 05:49:43 2012 -0400
+++ b/src/dev/x86/I8254.py Tue Aug 21 05:50:03 2012 -0400
@@ -34,6 +34,5 @@
class I8254(BasicPioDevice):
type = 'I8254'
cxx_class = 'X86ISA::I8254'
- pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
int_pin = Param.X86IntSourcePin(X86IntSourcePin(),
'Pin to signal timer interrupts to')
diff -r e353c178fb36 -r 019047ead23b src/dev/x86/I8259.py
--- a/src/dev/x86/I8259.py Tue Aug 21 05:49:43 2012 -0400
+++ b/src/dev/x86/I8259.py Tue Aug 21 05:50:03 2012 -0400
@@ -40,7 +40,6 @@
class I8259(BasicPioDevice):
type = 'I8259'
cxx_class='X86ISA::I8259'
- pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
output = Param.X86IntSourcePin(X86IntSourcePin(),
'The pin this I8259 drives')
mode = Param.X86I8259CascadeMode('How this I8259 is cascaded')
diff -r e353c178fb36 -r 019047ead23b src/dev/x86/PcSpeaker.py
--- a/src/dev/x86/PcSpeaker.py Tue Aug 21 05:49:43 2012 -0400
+++ b/src/dev/x86/PcSpeaker.py Tue Aug 21 05:50:03 2012 -0400
@@ -33,5 +33,4 @@
class PcSpeaker(BasicPioDevice):
type = 'PcSpeaker'
cxx_class = 'X86ISA::Speaker'
- pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
i8254 = Param.I8254('Timer that drives the speaker')
diff -r e353c178fb36 -r 019047ead23b src/dev/x86/SouthBridge.py
--- a/src/dev/x86/SouthBridge.py Tue Aug 21 05:49:43 2012 -0400
+++ b/src/dev/x86/SouthBridge.py Tue Aug 21 05:50:03 2012 -0400
@@ -45,7 +45,6 @@
class SouthBridge(SimObject):
type = 'SouthBridge'
- pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
platform = Param.Platform(Parent.any, "Platform this device is part of")
_pic1 = I8259(pio_addr=x86IOAddress(0x20), mode='I8259Master')
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