-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.gem5.org/r/1618/#review3819
-----------------------------------------------------------

Ship it!


Thanks, Nilay, this looks like a much cleaner solution.

I agree that the commented-out BaseSimpeCPU::CacheOp code should be deleted, 
but it would be preferable to do that in a separate changeset.  If you just 
defer that to a separate changeset, there's no need to repost for review IMO.

- Steve Reinhardt


On Jan. 11, 2013, 6:15 p.m., Nilay Vaish wrote:
> 
> -----------------------------------------------------------
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/1618/
> -----------------------------------------------------------
> 
> (Updated Jan. 11, 2013, 6:15 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Description
> -------
> 
> Changeset 9463:4f23fe95cda9
> ---------------------------
> x86: Changes to decoder, corrects 9376
> The changes made by the changeset 9376 were not quite correct. The patch made
> changes to the code which resulted in decoder not getting initialized 
> correctly
> when the state was restored from a checkpoint.
> 
> This patch adds a startup function to each ISA object. For x86, this function
> sets the required state in the decoder. For other ISAs, the function is empty
> right now.
> 
> 
> Diffs
> -----
> 
>   src/arch/alpha/isa.hh 5532a1642108 
>   src/arch/arm/isa.hh 5532a1642108 
>   src/arch/mips/isa.hh 5532a1642108 
>   src/arch/power/isa.hh 5532a1642108 
>   src/arch/sparc/isa.hh 5532a1642108 
>   src/arch/x86/isa.hh 5532a1642108 
>   src/arch/x86/isa.cc 5532a1642108 
>   src/cpu/o3/cpu.cc 5532a1642108 
>   src/cpu/simple/base.hh 5532a1642108 
>   src/cpu/simple/base.cc 5532a1642108 
>   src/cpu/simple_thread.hh 5532a1642108 
>   src/cpu/simple_thread.cc 5532a1642108 
> 
> Diff: http://reviews.gem5.org/r/1618/diff/
> 
> 
> Testing
> -------
> 
> 
> Thanks,
> 
> Nilay Vaish
> 
>

_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev

Reply via email to