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Ugh...another patch is going to cause us a lot of pain to merge with. We have a lot of internal code that add experiment specific information to the cache profiler. Those will all need to be changed quite a bit if this patch is checked in as is. The current patch moves some of the simple statistics from the CacheProfiler to the controller sim objects. However there are other, more complicated statistics that the Cache Profiler is convenient for. Furthermore, this patch doesn't appear to support all the existing m5 statistics, correct? Can this patch be extended to support all m5 statistics, histograms, etc.? Also can this patch move all the existing stats out of CacheProfiler without actually removing the file? - Brad Beckmann On May 13, 2013, 9:20 a.m., Nilay Vaish wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1849/ > ----------------------------------------------------------- > > (Updated May 13, 2013, 9:20 a.m.) > > > Review request for Default. > > > Description > ------- > > Changeset 9686:66375a5b9ece > --------------------------- > ruby: add stats to .sm files, remove cache profiler > This patch changes the way cache statistics are collected in ruby. > > As of now, there is separate entity called CacheProfiler which holds > statistical variables for caches. The CacheMemory class defines different > functions for accessing the CacheProfiler. These functions are then invoked > in the .sm files. I find this approach opaque and prone to error. Secondly, > we probably should not be paying the cost of a function call for recording > statistics. > > Instead, this patch allows for accessing statistical variables in the > .sm files. The collection would become transparent. Secondly, it would happen > in place, so no function calls. The patch also removes the CacheProfiler > class. > > > Diffs > ----- > > configs/ruby/MOESI_CMP_directory.py eb075b2b925a > configs/ruby/MOESI_CMP_token.py eb075b2b925a > src/mem/protocol/MESI_CMP_directory-L1cache.sm eb075b2b925a > src/mem/protocol/MESI_CMP_directory-L2cache.sm eb075b2b925a > src/mem/protocol/MI_example-cache.sm eb075b2b925a > src/mem/protocol/MOESI_CMP_directory-L1cache.sm eb075b2b925a > src/mem/protocol/MOESI_CMP_directory-L2cache.sm eb075b2b925a > src/mem/protocol/MOESI_CMP_token-L1cache.sm eb075b2b925a > src/mem/protocol/MOESI_CMP_token-L2cache.sm eb075b2b925a > src/mem/protocol/MOESI_hammer-cache.sm eb075b2b925a > src/mem/protocol/RubySlicc_Exports.sm eb075b2b925a > src/mem/protocol/RubySlicc_Types.sm eb075b2b925a > src/mem/ruby/profiler/CacheProfiler.hh eb075b2b925a > src/mem/ruby/profiler/CacheProfiler.cc eb075b2b925a > src/mem/ruby/profiler/Profiler.hh eb075b2b925a > src/mem/ruby/profiler/SConscript eb075b2b925a > src/mem/ruby/system/CacheMemory.hh eb075b2b925a > src/mem/ruby/system/CacheMemory.cc eb075b2b925a > src/mem/slicc/ast/InfixOperatorExprAST.py eb075b2b925a > src/mem/slicc/ast/OperatorExprAST.py PRE-CREATION > src/mem/slicc/ast/__init__.py eb075b2b925a > src/mem/slicc/parser.py eb075b2b925a > src/mem/slicc/symbols/StateMachine.py eb075b2b925a > > Diff: http://reviews.gem5.org/r/1849/diff/ > > > Testing > ------- > > This is how the output would look like: > > system.ruby.l1_cntrl0.L1Dcache.demand_hits 82 > # Number of cache demand hits > system.ruby.l1_cntrl0.L1Dcache.demand_misses 11220 > # Number of cache demand misses > system.ruby.l1_cntrl0.L1Dcache.demand_accesses 11302 > # Number of cache demand accesses > system.ruby.l1_cntrl0.L1Dcache.total_sw_prefetches 0 > # Number of software prefetches > system.ruby.l1_cntrl0.L1Dcache.total_hw_prefetches 0 > # Number of hardware prefetches > system.ruby.l1_cntrl0.L1Dcache.total_prefetches 0 > # Number of prefetches > system.ruby.l1_cntrl0.L1Dcache.num_data_array_reads 0 > # number of data array reads > system.ruby.l1_cntrl0.L1Dcache.num_data_array_writes 0 > # number of data array writes > system.ruby.l1_cntrl0.L1Dcache.num_tag_array_reads 0 > # number of tag array reads > system.ruby.l1_cntrl0.L1Dcache.num_tag_array_writes 0 > # number of tag array writes > system.ruby.l1_cntrl0.L1Dcache.num_tag_array_stalls 0 > # number of stalls caused by tag array > system.ruby.l1_cntrl0.L1Dcache.num_data_array_stalls 0 > # number of stalls caused by data array > system.ruby.l1_cntrl0.L1Icache.demand_hits 0 > # Number of cache demand hits > system.ruby.l1_cntrl0.L1Icache.demand_misses 105 > # Number of cache demand misses > system.ruby.l1_cntrl0.L1Icache.demand_accesses 105 > # Number of cache demand accesses > system.ruby.l1_cntrl0.L1Icache.total_sw_prefetches 0 > # Number of software prefetches > system.ruby.l1_cntrl0.L1Icache.total_hw_prefetches 0 > # Number of hardware prefetches > system.ruby.l1_cntrl0.L1Icache.total_prefetches 0 > # Number of prefetches > system.ruby.l1_cntrl0.L1Icache.num_data_array_reads 0 > # number of data array reads > system.ruby.l1_cntrl0.L1Icache.num_data_array_writes 0 > # number of data array writes > system.ruby.l1_cntrl0.L1Icache.num_tag_array_reads 0 > # number of tag array reads > system.ruby.l1_cntrl0.L1Icache.num_tag_array_writes 0 > # number of tag array writes > system.ruby.l1_cntrl0.L1Icache.num_tag_array_stalls 0 > # number of stalls caused by tag array > system.ruby.l1_cntrl0.L1Icache.num_data_array_stalls 0 > # number of stalls caused by data array > > > Thanks, > > Nilay Vaish > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
